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This patch implement assembler for the Zicond extension: CZEROEQZ and CZERONEZ.
Follow-up to CL 631576
Updates #75350
Change-Id: Icf4be131fe61c3b7a3bde4811cf42dc807660907
GitHub-Last-Rev: 6539cc86cbf3c49c3247ed935bcbbb31bb886dea
GitHub-Pull-Request: golang/go#75408
Reviewed-on: https://go-review.googlesource.com/c/go/+/702677
Reviewed-by: Mark Freeman <markfreeman@google.com>
Reviewed-by: Joel Sing <joel@sing.id.au>
Reviewed-by: Meng Zhuo <mengzhuo1203@gmail.com>
Reviewed-by: Michael Knyszek <mknyszek@google.com>
Reviewed-by: Mark Ryan <markdryan@rivosinc.com>
TryBot-Bypass: Joel Sing <joel@sing.id.au>
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Translate moves from an integer register to a floating point register, or
from a floating point register to an integer register, to the appropriate
move instruction (i.e. FMVXW/FMVWX/FMVXD/FMVDX).
Add support for MOVF with a constant - we previously added support for MOVD
but not for MOVF. Add special handling for 0.0, which we can translate to
a move from the zero register to a floating point register (leveraging the
above mentioned change).
Change-Id: If8df2f5610e69b4ec0af85efb884951024685f5b
Reviewed-on: https://go-review.googlesource.com/c/go/+/703216
Reviewed-by: Meng Zhuo <mengzhuo1203@gmail.com>
Reviewed-by: Mark Freeman <markfreeman@google.com>
Reviewed-by: Michael Knyszek <mknyszek@google.com>
LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
Reviewed-by: Mark Ryan <markdryan@rivosinc.com>
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Conflicts:
- src/internal/goexperiment/flags.go
Merge List:
+ 2025-09-15 ca0e03560d cmd/link: remove support for windows/arm relocations
+ 2025-09-15 17a0fabc43 cmd/link: remove support for darwin/386 relocations
+ 2025-09-15 eb7c67fdc9 cmd/internal/obj/loong64: use the MOVVP instruction to optimize prologue
+ 2025-09-15 6b8d507508 cmd/internal/obj/riscv: implement vector segment load/store instructions
+ 2025-09-15 7ddbf4d820 cmd/asm: add double precision comparision testcases for riscv64
+ 2025-09-15 c39abe0658 runtime: fix TestSehUnwind
+ 2025-09-15 e3ed0fbe6a all: replace strings.Split with strings.SplitSeq
+ 2025-09-15 10bfddc91d all: remove redundant words in comment
+ 2025-09-15 2469e92d8c cmd/compile: combine doubling with shift on riscv64
+ 2025-09-15 aa83aee7de net/http: clarify panic conditions in Handle, HandleFunc, AddInsecureBypassPattern
+ 2025-09-15 b9e2977f1d crypto/internal/cryptotest: use linux-amd64_avx512 builder for SHA-NI
+ 2025-09-15 8105d0ccc2 cmd/go,crypto/internal/fips140: prevent using FIPS 140-3 mode with purego tag
+ 2025-09-15 7f70ca8726 crypto/internal/cryptotest: add MustSupportFIPS140
+ 2025-09-15 9e71d8a9f7 cmd/internal/testdir: re-enable default all codegen flag on linux-amd64
+ 2025-09-15 004858ccdd all: replace os.Getenv("GO_BUILDER_NAME") with testenv.Builder in tests
+ 2025-09-15 dbde15800c cmd: vendor x/tools@9fccddc
+ 2025-09-15 8ace10dad2 os: add (*Process).WithHandle
+ 2025-09-15 3573227fe3 os: add and use errProcessReleased
+ 2025-09-15 68c6a73380 internal/syscall/unix: add KernelVersionGE
+ 2025-09-15 e603e9834e cmd/link: support race mode with MSVC clang
+ 2025-09-15 e5ee1f2600 test/codegen: check zerobase for newobject on 0-sized types
+ 2025-09-15 77b93d41d5 net/http: add comments for transport gzip reader
+ 2025-09-15 30d510ca2d cmd/compile,cmd/gofmt: use reflect.TypeFor
+ 2025-09-15 8320fe8f0e runtime: deduplicate syscall assembly for darwin
+ 2025-09-14 080882a928 net: use context.AfterFunc in connect
+ 2025-09-12 ac803b5949 cmd/go/internal/work: copy vet tool's stdout to our stdout
+ 2025-09-12 889e71c2ac runtime: move Windows types and consts to internal/runtime/syscall/windows
+ 2025-09-12 cc8a6780ac vendor: update x/tools to 3adf0e9, and other repos
+ 2025-09-12 911455fe18 cmd/link: don't count tbss section in TestFlagD
+ 2025-09-12 f1fd13016a cmd/compile: optimize abi.Type.GCData loads
+ 2025-09-12 dc960d0bfe cmd/compile, reflect: further allow inlining of TypeFor
+ 2025-09-12 7acb0d0446 runtime: fix syscall9 on darwin/arm64
+ 2025-09-12 60c1ee9183 internal/goexperiment: add a sizespecializedmalloc goexperiment setting
+ 2025-09-12 c70713da82 cmd/link: support MSVC clang
+ 2025-09-12 9271bbbb80 internal/testenv: update Builder docs with LUCI builder names
+ 2025-09-12 a4e25c3d65 net,internal/poll: skip TestAllocs when race is enabled on Windows
+ 2025-09-12 dd8276657f cmd/asm, cmd/internal/obj: add riscv64 generic CSR ops
+ 2025-09-11 f37d75472d runtime: move mksizeclasses.go to runtime/_mkmalloc
+ 2025-09-11 73676e3223 cmd/go: run cgo and cgo compiles in their own actions
+ 2025-09-11 0e1b98993e testing: exit B.Loop early upon saturation
+ 2025-09-11 84e9ab3984 cmd/go/internal/work: remove deps[1]="fmt" vet hack
Change-Id: I1424228bcd9291c9ff29f6ae843d5b90652f237e
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The MOVVP instruction has a larger offset range, and removes 928
instructions from the go binary on loong64.
file before after Δ
go 1634208 1634064 -144
gofmt 323324 323240 -84
asm 567870 567778 -92
cgo 487694 487598 -96
compile 2500266 2500142 -124
cover 530590 530498 -92
link 723804 723692 -112
preprofile 240562 240474 -88
vet 819672 819576 -96
Change-Id: Ib0efcb006d3ae3f2bceec0d6e88f3794d5e99831
Reviewed-on: https://go-review.googlesource.com/c/go/+/702715
Reviewed-by: abner chenc <chenguoqi@loongson.cn>
Reviewed-by: Mark Freeman <markfreeman@google.com>
Reviewed-by: Meidan Li <limeidan@loongson.cn>
Reviewed-by: Michael Knyszek <mknyszek@google.com>
LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
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https://github.com/riscv/riscv-opcodes/pull/361. After this pr was
merged, riscv-opcode can generate RVV segment load/store instructions
for Go. Implement vector segment load/store instuctions.
Change-Id: I154bb75be70c0a45e2279a75c67f68b5bb57c36e
Reviewed-on: https://go-review.googlesource.com/c/go/+/691695
Reviewed-by: Mark Freeman <markfreeman@google.com>
Reviewed-by: Michael Knyszek <mknyszek@google.com>
Reviewed-by: Meng Zhuo <mengzhuo1203@gmail.com>
LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
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Support is added for the generic RISC-V CSR operations; CSRRC, CSRRCI,
CSRRS, CSRRSI, CSRRW, CSRRWI. These instructions require special
handling as their second operand is a symbolic CSR register name and
not an immediate value or a register. CSR names are implemented as
special operands.
RISC-V CSRs are not currently saved and restored when a go routine is
asynchronously pre-empted so it is only safe to use these instructions
in hand written assembler. Note that CSRRS was already partially
supported by the assembler so this restriction predates this commit.
We mention it here as this commit makes CSRRS much easier to use.
Change-Id: I9ff8d804328b418a879d463e7d9cc31f489c7a00
Reviewed-on: https://go-review.googlesource.com/c/go/+/630519
Reviewed-by: Junyang Shao <shaojunyang@google.com>
Reviewed-by: Joel Sing <joel@sing.id.au>
LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
Reviewed-by: Meng Zhuo <mengzhuo1203@gmail.com>
Reviewed-by: Michael Pratt <mpratt@google.com>
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Merge List:
+ 2025-09-11 cf5e993177 cmd/link: allow one to specify the data section in the internal linker
+ 2025-09-11 cdb3d467fa encoding/gob: make use of reflect.TypeAssert
+ 2025-09-11 fef360964c archive/tar: fix typo in benchmark name
+ 2025-09-11 7d562b8460 syscall: actually remove unreachable code
+ 2025-09-11 c349582344 crypto/rsa: don't test CL 687836 against v1.0.0 FIPS 140-3 module
+ 2025-09-11 253dd08f5d debug/macho: filter non-external symbols when reading imported symbols without LC_DYSYMTAB
+ 2025-09-10 2009e6c596 internal/runtime/maps: remove redundant package docs
+ 2025-09-10 de5d7eccb9 runtime/internal/maps: only conditionally clear groups when sparse
+ 2025-09-10 8098b99547 internal/runtime/maps: speed up Clear
+ 2025-09-10 fe5420b054 cmd: delete some more windows/arm remnants
+ 2025-09-10 fad1dc608d runtime: don't artificially limit TestReadMetricsSched
+ 2025-09-10 b1f3e38e41 cmd/compile: when CSEing two values, prefer the statement marked one
+ 2025-09-10 00824f5ff5 types2: better documentation for resolve()
+ 2025-09-10 5cf8ca42e3 internal/trace/raw: use strings.Cut instead of strings.SplitN 2
+ 2025-09-10 80a2aae922 Revert "cmd/compile: improve stp merging for non-sequent cases"
+ 2025-09-10 f327a05419 go/token, syscall: annotate if blocks that defeat vet's unreachable pass
+ 2025-09-10 9650c97d0f syscall: remove unreachable code
+ 2025-09-10 f1c4b860d4 Revert "crypto/internal/fips140: update frozen module version to "v1.0.0""
+ 2025-09-10 30686c4cc8 encoding/json/v2: document context annotation with SemanticError
+ 2025-09-09 c5737dc21b runtime: when using cgo on 386, call C sigaction function
+ 2025-09-09 b9a4a09b0f runtime: remove duff support for riscv64
+ 2025-09-09 4dac9e093f cmd/compile: use generated loops instead of DUFFCOPY on riscv64
+ 2025-09-09 879ff736d3 cmd/compile: use generated loops instead of DUFFZERO on riscv64
+ 2025-09-09 77643dc63f cmd/compile: simplify zerorange on riscv64
+ 2025-09-09 e6605a1bcc encoding/json: use reflect.TypeAssert
+ 2025-09-09 4c20f7f15a cmd/cgo: run gcc to get errors and debug info in parallel
+ 2025-09-09 5dcedd6550 runtime: lock mheap_.speciallock when allocating synctest specials
+ 2025-09-09 d3be949ada runtime: don't negate eventfd errno
+ 2025-09-09 836fa74518 syscall: optimise cgo clearenv
+ 2025-09-09 ce39174482 crypto/rsa: check PrivateKey.D for consistency with Dp and Dq
+ 2025-09-09 5d9d0513dc crypto/rsa: check for post-Precompute changes in Validate
+ 2025-09-09 968a5107a9 crypto/internal/fips140: update frozen module version to "v1.0.0"
+ 2025-09-09 645ee44492 crypto/ecdsa: deprecate direct use of big.Int fields in keys
+ 2025-09-09 a67977da5e cmd/compile/internal/inline: ignore superfluous slicing
+ 2025-09-09 a5fa5ea51c cmd/compile/internal/ssa: expand runtime.memequal for length {3,5,6,7}
+ 2025-09-09 4c63d798cb cmd/compile: improve stp merging for non-sequent cases
+ 2025-09-09 bdd51e7855 cmd/compile: use constant zero register instead of specialized zero instructions on mips64x
+ 2025-09-09 10ac80de77 cmd/compile: introduce CCMP generation
+ 2025-09-09 3b3b16957c Revert "cmd/go: use os.Rename to move files on Windows"
+ 2025-09-09 e3223518b8 cmd/go: split generating cover files into its own action
+ 2025-09-09 af03343f93 cmd/compile: fix bounds check report
+ 2025-09-08 6447ff409a cmd/compile: fold constant in ADDshift op on loong64
+ 2025-09-08 5b218461f9 cmd/compile: optimize loads from abi.Type.{Size_,PtrBytes,Kind_}
+ 2025-09-08 b915e14490 cmd/compile: consolidate logic for rewriting fixed loads
+ 2025-09-08 06e791c0cd cmd/compile: simplify zerorange on mips
+ 2025-09-08 cf42b785b7 cmd/cgo: run recordTypes for each of the debugs at the end of Translate
+ 2025-09-08 5e6296f3f8 archive/tar: optimize nanosecond parsing in parsePAXTime
+ 2025-09-08 ea00650784 debug/pe: permit symbols with no name
+ 2025-09-08 4cc7cc74c3 crypto: update Hash comments to point to crypto/sha3
+ 2025-09-08 ff45d5d53c encoding/json/internal/jsonflags: fix comment with wrong field name
+ 2025-09-06 861c90c907 net/http: pool transport gzip readers
+ 2025-09-06 57769b5532 os: reject OpenDir of a non-directory file in Plan 9
+ 2025-09-06 a6144613d3 crypto/tls: use context.AfterFunc in handshakeContext
+ 2025-09-05 e8126bce9e runtime/cgo: save and restore R31 for crosscall1 on loong64
+ 2025-09-05 d767064170 cmd/compile: mark abi.PtrType.Elem sym as used
+ 2025-09-05 0b1eed09a3 vendor/golang.org/x/tools: update to a09a2fb
+ 2025-09-05 f5b20689e9 cmd/compile: optimize loads from readonly globals into constants on loong64
+ 2025-09-05 3492e4262b cmd/compile: simplify specific addition operations using the ADDV16 instruction
+ 2025-09-05 459b85ccaa cmd/fix: remove all functionality except for buildtag
+ 2025-09-05 87e72769fa runtime: simplify openbsd check in usesLibcall and mStackIsSystemAllocated
+ 2025-09-05 bb48272e24 cmd/compile: simplify zerorange on mips64
+ 2025-09-05 d52a56cce1 cmd/link/internal/ld: unconditionally use posix_fallocate on FreeBSD
+ 2025-09-04 9d0829963c net/http: fix cookie value of "" being interpreted as empty string.
+ 2025-09-04 ddce0522be cmd/internal/obj/loong64: add ADDU16I.D instruction support
+ 2025-09-04 00b8474e47 cmd/trace: don't filter events for profile by whether they have stack
+ 2025-09-04 e36c5aead6 log/slog: add multiple handlers support for logger
+ 2025-09-04 150fae714e crypto/x509: don't force system roots load in SetFallbackRoots
+ 2025-09-04 4f7bbc62c7 runtime, cmd/compile, cmd/internal/obj: remove duff support for loong64
+ 2025-09-04 b8cc907425 cmd/internal/obj/loong64: fix the usage of offset in the instructions [X]VLDREPL.{B/H/W/D}
+ 2025-09-04 8c27a80890 path{,/filepath}: speed up Match
+ 2025-09-04 b7c20413c5 runtime: remove obsolete osArchInit function
+ 2025-09-04 df29038486 cmd/compile/internal/ssa: load constant values from abi.PtrType.Elem
+ 2025-09-04 4373754bc9 cmd/compile: add store to load forwarding rules on riscv64
+ 2025-09-03 80038586ed cmd/compile: export to DWARF types only referenced through interfaces
+ 2025-09-03 91e76a513b cmd/compile: use generated loops instead of DUFFCOPY on loong64
+ 2025-09-03 c552ad913f cmd/compile: simplify memory load and store operations on loong64
+ 2025-09-03 e8f9127d1f net/netip: export Prefix.Compare, fix ordering
+ 2025-09-03 731e546166 cmd/compile: simplify the support for 32bit high multiply on loong64
Change-Id: I2c124fb8071e2972d39804867cafb6806e601aba
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Change-Id: I987d9f49fbd2650eef4224f72271bf752c54d39c
Reviewed-on: https://go-review.googlesource.com/c/go/+/700538
Reviewed-by: Mark Freeman <markfreeman@google.com>
Reviewed-by: Keith Randall <khr@golang.org>
Reviewed-by: Keith Randall <khr@google.com>
LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
Reviewed-by: Mark Ryan <markdryan@rivosinc.com>
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Go asm syntax:
ADDV16 $(1<<16), R4, R5
Equivalent platform assembler syntax:
addu16i.d r5, r4, $1
Change-Id: Ica4a4e779d0a107cda3eade86027abd6458779a4
Reviewed-on: https://go-review.googlesource.com/c/go/+/699056
Reviewed-by: abner chenc <chenguoqi@loongson.cn>
Reviewed-by: Michael Pratt <mpratt@google.com>
Auto-Submit: Michael Pratt <mpratt@google.com>
LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
Reviewed-by: Cherry Mui <cherryyz@google.com>
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Change-Id: I44d6452933c8010f7dfbf821a32053f9d1cf151e
Reviewed-on: https://go-review.googlesource.com/c/go/+/700096
LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
Reviewed-by: Keith Randall <khr@golang.org>
Reviewed-by: sophie zhao <zhaoxiaolin@loongson.cn>
Reviewed-by: abner chenc <chenguoqi@loongson.cn>
Reviewed-by: Michael Pratt <mpratt@google.com>
Reviewed-by: Keith Randall <khr@google.com>
Auto-Submit: Michael Pratt <mpratt@google.com>
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[X]VLDREPL.{B/H/W/D}
The previously defined usage of offset was ambiguous and not easy to understand.
For example, to fetch 4 bytes of data from the address base+8 and
broadcast it to each word element of vector register V5, the assembly
implementation is as follows:
previous: VMOVQ 2(base), V5.W4
current: VMOVQ 8(base), V5.W4
Change-Id: I8bc84e35033ab63bd10f4c61618789f94314f78c
Reviewed-on: https://go-review.googlesource.com/c/go/+/699875
Reviewed-by: Cherry Mui <cherryyz@google.com>
Reviewed-by: Michael Pratt <mpratt@google.com>
Reviewed-by: abner chenc <chenguoqi@loongson.cn>
Auto-Submit: Michael Pratt <mpratt@google.com>
Reviewed-by: Meidan Li <limeidan@loongson.cn>
LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
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Merge List:
+ 2025-09-03 4c4cefc19a cmd/gofmt: simplify logic to process arguments
+ 2025-09-03 925a3cdcd1 unicode/utf8: make DecodeRune{,InString} inlineable
+ 2025-09-03 3e596d448f math: rename Modf parameter int to integer
+ 2025-09-02 2a7f1d47b0 runtime: use one more address bit for tagged pointers
+ 2025-09-02 b09068041a cmd/dist: run racebench tests only in longtest mode
+ 2025-09-02 355370ac52 runtime: add comment for concatstring2
+ 2025-09-02 1eec830f54 go/doc: linkify interface methods
+ 2025-08-31 7bba745820 cmd/compile: use generated loops instead of DUFFZERO on loong64
+ 2025-08-31 882335e2cb cmd/internal/obj/loong64: add LDPTR.{W/D} and STPTR.{W/D} instructions support
+ 2025-08-31 d4b17f5869 internal/runtime/atomic: reset wrong jump target in Cas{,64} on loong64
+ 2025-08-31 6a08e80399 net/http: skip redirecting in ServeMux when URL path for CONNECT is empty
+ 2025-08-29 8bcda6c79d runtime/race: add race detector support for linux/riscv64
+ 2025-08-29 8377adafc5 cmd/cgo: split loadDWARF into two parts
+ 2025-08-29 a7d9d5a80a cmd/cgo: move typedefs and typedefList out of Package
+ 2025-08-29 1d459c4357 all: delete more windows/arm remnants
+ 2025-08-29 27ce6e4e26 cmd/compile: remove sign extension before MULW on riscv64
+ 2025-08-29 84b070bfb1 cmd/compile/internal/ssa: make oneBit function generic
+ 2025-08-29 fe42628dae internal/cpu: inline DebugOptions
+ 2025-08-29 94b7d519bd net: update document on limitation of iprawsock on Windows
+ 2025-08-29 ba9e1ddccf testing: allow specify temp dir by GOTMPDIR environment variable
+ 2025-08-29 9f6936b8da cmd/link: disallow linkname of runtime.addmoduledata
+ 2025-08-29 89d41d254a bytes, strings: speed up TrimSpace
+ 2025-08-29 38204e0872 testing/synctest: call out common issues with tests
+ 2025-08-29 252c901125 os,syscall: pass file flags to CreateFile on Windows
+ 2025-08-29 53515fb0a9 crypto/tls: use hash.Cloner
+ 2025-08-28 13bb48e6fb go/constant: fix complex != unknown comparison
+ 2025-08-28 ba1109feb5 net: remove redundant cgoLookupCNAME return parameter
+ 2025-08-28 f74ed44ed9 net/http/httputil: remove redundant pw.Close() call in DumpRequestOut
+ 2025-08-28 a9689d2e0b time: skip TestLongAdjustTimers in short mode on single CPU systems
+ 2025-08-28 ebc763f76d syscall: only get parent PID if SysProcAttr.Pdeathsig is set
+ 2025-08-28 7f1864b0a8 strings: remove redundant "runs" from string.Fields docstring
+ 2025-08-28 90c21fa5b6 net/textproto: eliminate some bounds checks
+ 2025-08-27 e47d88beae os: return nil slice when ReadDir is used with a file on file_windows
+ 2025-08-27 6b837a64db cmd/internal/obj/loong64: simplify buildop
+ 2025-08-27 765905e3bd debug/elf: don't panic if symtab too small
+ 2025-08-27 2ee4b31242 net/http: Ensure that CONNECT proxied requests respect MaxResponseHeaderBytes
+ 2025-08-27 b21867b1a2 net/http: require exact match for CrossSiteProtection bypass patterns
+ 2025-08-27 d19e377f6e cmd/cgo: make it safe to run gcc in parallel
+ 2025-08-27 49a2f3ed87 net: allow zero value destination address in WriteMsgUDPAddrPort
+ 2025-08-26 afc51ed007 internall/poll: remove bufs field from Windows' poll.operation
+ 2025-08-26 801b74eb95 internal/poll: remove rsa field from Windows' poll.operation
+ 2025-08-26 fa18c547cd syscall: sort Windows env block in StartProcess
+ 2025-08-26 bfd130db02 internal/poll: don't use stack-allocated WSAMsg parameters
+ 2025-08-26 dae9e456ae runtime: identify virtual memory layout for riscv64
+ 2025-08-25 25c2d4109f math: use Trunc to implement Modf
+ 2025-08-25 4e05a070c4 math: implement IsInf using Abs
+ 2025-08-25 1eed4f32a0 math: optimize Signbit implementation slightly
+ 2025-08-25 bd71b94659 cmd/compile/internal: optimizing add+sll rule using ALSLV instruction on loong64
+ 2025-08-25 ea55ca3600 runtime: skip doInit of plugins in runtime.main
+ 2025-08-25 9ae2f1fb57 internal/trace: skip async preempt off tests on low end systems
+ 2025-08-25 bbd5342a62 net: fix cgoResSearch
+ 2025-08-25 ed7f804775 os: set full name for Roots created with Root.OpenRoot
+ 2025-08-25 a21249436b internal/poll: use fdMutex to provide read/write locking on Windows
+ 2025-08-24 44c5956bf7 test/codegen: add Mul2 and DivPow2 test for loong64
+ 2025-08-24 0aa8019e94 test/codegen: add Mul* test for loong64
+ 2025-08-24 83420974b7 test/codegen: add sqrt* abs and copysign test for loong64
+ 2025-08-23 f2db0dca0b net/http/httptest: redirect example.com requests to server
+ 2025-08-22 d86ec92499 internal/syscall/windows: increase internal Windows O_ flags values
+ 2025-08-22 9d3f7fda70 crypto/tls: fix quic comment typo
+ 2025-08-22 78a05c541f internal/poll: don't pass non-nil WSAMsg.Name with 0 namelen on windows
+ 2025-08-22 52c3f73fda runtime/metrics: improve doc
+ 2025-08-22 a076f49757 os: fix Root.MkdirAll to handle race of directory creation
+ 2025-08-22 98238fd495 all: delete remaining windows/arm code
+ 2025-08-21 1ad30844d9 cmd/asm: process forward jump to PCALIGN
+ 2025-08-21 13c082601d internal/poll: permit nil destination address in WriteMsg{Inet4,Inet6}
+ 2025-08-21 9b0a507735 runtime: remove remaining windows/arm files and comments
+ 2025-08-21 1843f1e9c0 cmd/compile: use zero register instead of specialized *zero instructions on loong64
+ 2025-08-21 e0870a0a12 cmd/compile: simplify zerorange on loong64
+ 2025-08-21 fb8bbe46d5 cmd/compile/internal/ssa: eliminate unnecessary extension operations
+ 2025-08-21 9632ba8160 cmd/compile: optimize some patterns into revb2h/revb4h instruction on loong64
+ 2025-08-21 8dcab6f450 syscall: simplify execve handling on libc platforms
+ 2025-08-21 ba840c1bf9 cmd/compile: deduplication in the source code generated by mknode
+ 2025-08-21 fa706ea50f cmd/compile: optimize rule (x + x) << c to x << c+1 on loong64
+ 2025-08-21 ffc85ee1f1 cmd/internal/objabi,cmd/link: add support for additional riscv64 relocations
Change-Id: I3896f74b1a3cc0a52b29ca48767bb0ba84620f71
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This required changes to the assembler so that VMOVSS and VMOVSD
could handle FP constants.
Change-Id: Iaa2f8df71867a3283bc058b7ec691b56a3e73621
Reviewed-on: https://go-review.googlesource.com/c/go/+/698240
Reviewed-by: Junyang Shao <shaojunyang@google.com>
LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
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Go asm syntax:
MOVWP 4(R4), R5
MOVVP 8(R4), R5
MOVWP R4, 12(R5)
MOVVP R4, 16(R5)
Equivalent platform assembler syntax:
ldptr.w r5, r4, $1
ldptr.d r5, r4, $2
stptr.w r4, r5, $3
stptr.d r4, r5, $4
Change-Id: I50a341cee2d875cb7c5da9db08b23799c9dc6c64
Reviewed-on: https://go-review.googlesource.com/c/go/+/699055
Reviewed-by: abner chenc <chenguoqi@loongson.cn>
Reviewed-by: Meidan Li <limeidan@loongson.cn>
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Reviewed-by: Carlos Amedee <carlos@golang.org>
Reviewed-by: Cherry Mui <cherryyz@google.com>
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The length of array optab is readily available, remove the sentinel and
sentinel scan, like arm64.
Change-Id: Iceeed22587ce2beeedeb5babdde3474e75d70f89
Reviewed-on: https://go-review.googlesource.com/c/go/+/699095
Reviewed-by: abner chenc <chenguoqi@loongson.cn>
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Reviewed-by: Carlos Amedee <carlos@golang.org>
Reviewed-by: Cherry Mui <cherryyz@google.com>
Reviewed-by: Meidan Li <limeidan@loongson.cn>
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Fixes #43800
Updates #71671
Change-Id: Ib7aafe3a3f6ae48f23fa23f03103820e9fcf5161
Reviewed-on: https://go-review.googlesource.com/c/go/+/698415
Reviewed-by: Quim Muntal <quimmuntal@gmail.com>
Reviewed-by: Cherry Mui <cherryyz@google.com>
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Reviewed-by: Filippo Valsorda <filippo@golang.org>
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The forward jump target are not processed when the target is PCALIGN, so
process it before emit nops for PCALIGN.
Fixes #74648
Change-Id: I690fbfacf79e26d7a37628a2551729b2381616c5
Reviewed-on: https://go-review.googlesource.com/c/go/+/696915
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Change-Id: I742b49a3889892b7b1bb354f47f1c0d933c041e4
Reviewed-on: https://go-review.googlesource.com/c/go/+/682395
Auto-Submit: Keith Randall <khr@golang.org>
Reviewed-by: Jorropo <jorropo.pgm@gmail.com>
Reviewed-by: Keith Randall <khr@google.com>
Reviewed-by: Michael Knyszek <mknyszek@google.com>
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Change-Id: Ib290079a77a746a8512cd4638310b24164f6a930
Reviewed-on: https://go-review.googlesource.com/c/go/+/679456
Reviewed-by: Keith Randall <khr@google.com>
Reviewed-by: Jorropo <jorropo.pgm@gmail.com>
Reviewed-by: Michael Knyszek <mknyszek@google.com>
Auto-Submit: Keith Randall <khr@golang.org>
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Regenerate instruction encodings for riscv64, including rv64_c, rv_c
and rv_c_d.
Updates #71105
Change-Id: I004cc00290bf018ebb848592d84d924481f03851
Reviewed-on: https://go-review.googlesource.com/c/go/+/523476
Reviewed-by: Meng Zhuo <mengzhuo1203@gmail.com>
Reviewed-by: Cherry Mui <cherryyz@google.com>
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'ADDshiftLLV' on loong64
goos: linux
goarch: loong64
pkg: cmd/compile/internal/test
cpu: Loongson-3A6000-HV @ 2500.00MHz
│ old │ new │
│ sec/op │ sec/op vs base │
MulconstI32/3 0.8004n ± 0% 0.4247n ± 2% -46.94% (p=0.000 n=10)
MulconstI32/5 0.8005n ± 0% 0.4256n ± 1% -46.83% (p=0.000 n=10)
MulconstI32/12 1.2010n ± 0% 0.8005n ± 0% -33.35% (p=0.000 n=10)
MulconstI32/120 0.8090n ± 0% 0.8067n ± 0% -0.28% (p=0.007 n=10)
MulconstI32/-120 0.8109n ± 0% 0.8072n ± 0% -0.47% (p=0.000 n=10)
MulconstI32/65537 0.8004n ± 0% 0.8004n ± 0% ~ (p=1.000 n=10)
MulconstI32/65538 0.8005n ± 0% 0.8005n ± 0% ~ (p=0.265 n=10)
MulconstI64/3 0.8005n ± 0% 0.4241n ± 1% -47.02% (p=0.000 n=10)
MulconstI64/5 0.8004n ± 0% 0.4249n ± 1% -46.91% (p=0.000 n=10)
MulconstI64/12 1.2010n ± 0% 0.8004n ± 0% -33.36% (p=0.000 n=10)
MulconstI64/120 0.8005n ± 0% 0.8005n ± 0% ~ (p=0.635 n=10)
MulconstI64/-120 0.8005n ± 0% 0.8005n ± 0% ~ (p=0.837 n=10)
MulconstI64/65537 0.8005n ± 0% 0.8005n ± 0% ~ (p=0.837 n=10)
MulconstI64/65538 0.8096n ± 0% 0.8004n ± 0% -1.14% (p=0.000 n=10)
MulconstU32/3 0.8004n ± 0% 0.4263n ± 1% -46.75% (p=0.000 n=10)
MulconstU32/5 0.8005n ± 0% 0.4262n ± 1% -46.76% (p=0.000 n=10)
MulconstU32/12 1.2010n ± 0% 0.8005n ± 0% -33.35% (p=0.000 n=10)
MulconstU32/120 0.8105n ± 0% 0.8096n ± 0% ~ (p=0.183 n=10)
MulconstU32/65537 0.8004n ± 0% 0.8004n ± 0% ~ (p=1.000 n=10)
MulconstU32/65538 0.8005n ± 0% 0.8005n ± 0% ~ (p=1.000 n=10)
MulconstU64/3 0.8004n ± 0% 0.4265n ± 4% -46.71% (p=0.000 n=10)
MulconstU64/5 0.8004n ± 0% 0.4256n ± 0% -46.82% (p=0.000 n=10)
MulconstU64/12 1.2010n ± 0% 0.8004n ± 0% -33.36% (p=0.000 n=10)
MulconstU64/120 0.8005n ± 0% 0.8005n ± 0% ~ (p=0.387 n=10)
MulconstU64/65537 0.8005n ± 0% 0.8005n ± 0% ~ (p=0.265 n=10)
MulconstU64/65538 0.8080n ± 0% 0.8004n ± 0% -0.93% (p=0.000 n=10)
geomean 0.8539n 0.6597n -22.74%
Change-Id: Ie33e88985d7639f481bbba540bc917b9f185c357
Reviewed-on: https://go-review.googlesource.com/c/go/+/693855
Reviewed-by: Dmitri Shuralyov <dmitshur@google.com>
Reviewed-by: Keith Randall <khr@google.com>
Reviewed-by: sophie zhao <zhaoxiaolin@loongson.cn>
Reviewed-by: abner chenc <chenguoqi@loongson.cn>
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When executing the alsl.w/wu/d family of instructions, the actual shift amount is the immediate value
in the instruction encoding plus one. Therefore, this change is made to align the immediate value
in the assembly code with the programmer's intended shift amount, and to include the result of
the immediate value minus one in the final encoding.
Change-Id: Ic82249251878eabde8372e183d841a03f963f9f9
Reviewed-on: https://go-review.googlesource.com/c/go/+/693475
Reviewed-by: Dmitri Shuralyov <dmitshur@google.com>
Reviewed-by: Mark Freeman <markfreeman@google.com>
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Go asm syntax:
FSEL FCC, FK, FJ, FD
Equivalent platform assembler syntax:
fsel fd, fj, fk, ca
Change-Id: If75f16fca0adfc03f4952f8a5143d22da33ed425
Reviewed-on: https://go-review.googlesource.com/c/go/+/693457
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Reviewed-by: Dmitri Shuralyov <dmitshur@google.com>
Reviewed-by: Mark Freeman <markfreeman@google.com>
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Go asm syntax:
ALSL{W/WU/V} $3, R4, R5, R6
Equivalent platform assembler syntax:
alsl.{w/wu/d} $r6, $r4, $r5, 3
Change-Id: Ic8364dfe2753bcea7de6cffe656ca0dde6875766
Reviewed-on: https://go-review.googlesource.com/c/go/+/692136
Reviewed-by: Dmitri Shuralyov <dmitshur@google.com>
Reviewed-by: abner chenc <chenguoqi@loongson.cn>
Reviewed-by: Mark Freeman <markfreeman@google.com>
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Fixes #74076
Change-Id: Icc67b3d4e342f329584433bd1250c56ae8f5a73d
Reviewed-on: https://go-review.googlesource.com/c/go/+/690635
Reviewed-by: Alan Donovan <adonovan@google.com>
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Reviewed-by: Keith Randall <khr@google.com>
Auto-Submit: Alan Donovan <adonovan@google.com>
Reviewed-by: Dmitri Shuralyov <dmitshur@google.com>
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instructions support
Go asm syntax:
V{BITCLR/BITSET/BITREV}{B/H/W/V} $1, V2, V3
XV{BITCLR/BITSET/BITREV}{B/H/W/V} $1, X2, X3
V{BITCLR/BITSET/BITREV}{B/H/W/V} VK, VJ, VD
XV{BITCLR/BITSET/BITREV}{B/H/W/V} XK, XJ, XD
Equivalent platform assembler syntax:
v{bitclr/bitset/bitrev}i.{b/h/w/d} v3, v2, $1
xv{bitclr/bitset/bitrev}i.{b/h/w/d} x3, x2, $1
v{bitclr/bitset/bitrev}.{b/h/w/d} vd, vj, vk
xv{bitclr/bitset/bitrev}.{b/h/w/d} xd, xj, xk
Change-Id: I244f8ae316f72cc7ea01ca0139ac78c5616a3c5b
Reviewed-on: https://go-review.googlesource.com/c/go/+/677435
Reviewed-by: Cherry Mui <cherryyz@google.com>
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Reviewed-by: Mark Freeman <mark@golang.org>
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Go asm syntax:
VMOVQ offset(Rj), Vd.<T>
XVMOVQ offset(Rj), Xd.<T>
<T> can have the following values:
B16, H8, W4, V2, B32, H16, W8, V4
Change-Id: I44af51d58bb62649d3fe360b3abb771565e78a8a
Reviewed-on: https://go-review.googlesource.com/c/go/+/682895
Reviewed-by: abner chenc <chenguoqi@loongson.cn>
Reviewed-by: Michael Knyszek <mknyszek@google.com>
Reviewed-by: Meidan Li <limeidan@loongson.cn>
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Add the VECTOR FP (MINIMUM|MAXIMUM) instructions to the assembler and
use them in the compiler to implement min and max.
Note: I've allowed floating point registers to be used with the single
element instructions (those with the W instead of V prefix) to allow
easier integration into the compiler.
Change-Id: I5f80a510bd248cf483cce95f1979bf63fbae7de6
Reviewed-on: https://go-review.googlesource.com/c/go/+/684715
Reviewed-by: Keith Randall <khr@golang.org>
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Reviewed-by: Keith Randall <khr@google.com>
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The previous CL made this adjustment unnecessary. The argp field
is no longer used by the runtime.
Change-Id: I3491eeef4103c6653ec345d604c0acd290af9e8f
Reviewed-on: https://go-review.googlesource.com/c/go/+/685356
Reviewed-by: Michael Knyszek <mknyszek@google.com>
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Reviewed-by: Cuong Manh Le <cuong.manhle.vn@gmail.com>
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Change-Id: I13f54f04ccb8452e625dba4249e0d56bafd1fad8
Reviewed-on: https://go-review.googlesource.com/c/go/+/682397
Reviewed-by: Michael Knyszek <mknyszek@google.com>
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MVCLE (Move Long Extended) instruction is used to move large data storage-to-storage.
This change will add MVCLE into the Go asm for s390x architecture.
Upcoming PR of runtime/memmove_s390x.s will use this instruction for performance improvement.
Change-Id: I3bbb6668c736a36849917887398c74cebb1c3a99
Reviewed-on: https://go-review.googlesource.com/c/go/+/677455
Reviewed-by: Srinivas Pokala <Pokala.Srinivas@ibm.com>
Reviewed-by: Keith Randall <khr@golang.org>
Auto-Submit: Michael Knyszek <mknyszek@google.com>
Reviewed-by: Keith Randall <khr@google.com>
Reviewed-by: Michael Munday <mikemndy@gmail.com>
Reviewed-by: Vishwanatha HD <vishwanatha.hd@ibm.com>
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That way, the frame is atomically popped. Previously, for big frames
the SP was unwound in two steps (because arm64 can only add constants
up to 1<<12 in a single instruction).
Fixes #73259
Change-Id: I382c249194ad7bc9fc19607c27487c58d90d49e5
Reviewed-on: https://go-review.googlesource.com/c/go/+/689235
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Reviewed-by: Keith Randall <khr@google.com>
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This CL enable R_RISCV_GOT_PCREL_ITYPE in fips140
Fixes #74662
Change-Id: Ic189c4e352517ae74034f207a5f944b610f2eb73
Reviewed-on: https://go-review.googlesource.com/c/go/+/688635
Reviewed-by: Mark Ryan <markdryan@rivosinc.com>
Reviewed-by: Cherry Mui <cherryyz@google.com>
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Reviewed-by: Julian Zhu <jz531210@gmail.com>
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table
In the type descriptor's method table, it contains relative PCs of
the methods (relative to the start of the text section) stored as
32-bit offsets. On Wasm, a PC is PC_F<<16 + PC_B, where PC_F is
the function index, and PC_B is the block index. When there are
more than 65536 functions, the PC will not fit into 32-bit (and
relative to the section start doesn't help). Since there are no
more bits for the function index, and the method table always
targets the entry of a method, we put just the PC_F there, and
rewrite back to a full PC at run time when we need the PC. This
way we can have more than 65536 functions.
The func table also contains 32-bit relative PCs, and it also
always points to function entries. Do the same there, as well
as other places where we use relative text offsets.
Also add the relocation type in the relocation overflow error
message.
Also add check for function too big on Wasm. If a function has
more than 65536 blocks, PC_B will overflow and PC = PC_F<<16 + PC_B
will points to the wrong function.
Fixes #64856.
Change-Id: If9c307e9fb1641f367a5f19c39f88f455805d0bb
Reviewed-on: https://go-review.googlesource.com/c/go/+/552835
Reviewed-by: Than McIntosh <thanm@google.com>
Reviewed-by: Dmitri Shuralyov <dmitshur@google.com>
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Currently, on Wasm, an indirect call is compiled to
// function index = PC>>16, PC is already on stack
I32WrapI64
I32Const $16
ShrU
// set PC_B to 0
...
// actual call
CallIndirect
Specifically, the function index is extracted from bits 16-31 of
the "PC". When there are more than 65536 functions, this will
overflow and wrap around, causing wrong function being called.
This CL changes it to use 64-bit operations to extract the
function index from the "PC", so there are enough bits to for it.
For #64856.
Change-Id: I83c11db4b78cf66250e88ac02a82bd13730a8914
Reviewed-on: https://go-review.googlesource.com/c/go/+/567896
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Reviewed-by: Dmitri Shuralyov <dmitshur@google.com>
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This String method can potentially recurse infinitely, since %#x will
apparently call String if the method exists. This isn't well documented,
but cmd/vet will be updated soon to check this (when we update the
vendored x/tools dependency) so cut off the recursion by converting to
the underlying type first.
Change-Id: Ia6fc046c9eb56a5dd6a33772afd23da443a06116
Reviewed-on: https://go-review.googlesource.com/c/go/+/677261
Auto-Submit: Michael Knyszek <mknyszek@google.com>
Reviewed-by: David Chase <drchase@google.com>
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|
|
Change-Id: Ie788747372cd47cb3780e75b35750bb08bd166fc
Reviewed-on: https://go-review.googlesource.com/c/go/+/542835
Reviewed-by: sophie zhao <zhaoxiaolin@loongson.cn>
Reviewed-by: David Chase <drchase@google.com>
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Reviewed-by: Meidan Li <limeidan@loongson.cn>
Auto-Submit: abner chenc <chenguoqi@loongson.cn>
Reviewed-by: Michael Knyszek <mknyszek@google.com>
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The RISC-V integer vector multiply add instructions are not encoded
correctly; the first and second arguments are swapped. For example,
the instruction
VMACCVV V1, V2, V3
encodes to
b620a1d7 or vmacc.vv v3,v1,v2
and not
b61121d7 or vmacc.vv v3,v2,v1
as expected.
This is inconsistent with the argument ordering we use for 3
argument vector instructions, in which the argument order, as given
in the RISC-V specifications, is reversed, and also with the vector
FMA instructions which have the same argument ordering as the vector
integer multiply add instructions in the "The RISC-V Instruction Set
Manual Volume I". For example, in the ISA manual we have the
following instruction definitions
; Integer multiply-add, overwrite addend
vmacc.vv vd, vs1, vs2, vm # vd[i] = +(vs1[i] * vs2[i]) + vd[i]
; FP multiply-accumulate, overwrites addend
vfmacc.vv vd, vs1, vs2, vm # vd[i] = +(vs1[i] * vs2[i]) + vd[i]
It's reasonable to expect that the Go assembler would use the same
argument ordering for both of these instructions. It currently does
not.
We fix the issue by switching the argument ordering for the vector
integer multiply add instructions to match those of the vector FMA
instructions.
Change-Id: Ib98e9999617f991969e5c831734b3bb3324439f6
Reviewed-on: https://go-review.googlesource.com/c/go/+/670335
Reviewed-by: Carlos Amedee <carlos@golang.org>
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instruction PRELDX
before:
MOVV $n + $offset, Roff
PRELDX (Rbase)(Roff), $hint
after:
PRELDX offset(Rbase), $n, $hint
This instruction is supported in CL 671875, but is not actually used
Change-Id: I943d488ea6dc77781cd796ef480a89fede666bab
Reviewed-on: https://go-review.googlesource.com/c/go/+/673155
Reviewed-by: Meidan Li <limeidan@loongson.cn>
Reviewed-by: sophie zhao <zhaoxiaolin@loongson.cn>
Reviewed-by: Michael Knyszek <mknyszek@google.com>
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|
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In order to make it easier to write in assembly and to be consistent
with the usage of general instructions, a new assembly format is
added for the instructions VANDV and VANDB.
It also works for instructions XVAND{V,B}, [X]V{OR,XOR,NOR,ANDN,ORN}V
and [X]V{OR,XOR,NOR}B.
Change-Id: Ia75d607ac918950e58840ec627aaf0be45d837fe
Reviewed-on: https://go-review.googlesource.com/c/go/+/671316
Reviewed-by: Cherry Mui <cherryyz@google.com>
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|
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Go asm syntax:
PRELD 16(R4), $8
PRELDX (R4)(R5), $8
Equivalent platform assembler syntax:
preld $8, $r4, 16
preldx $8, $r4, $r5
Change-Id: Ie81d22ebaf4153388a7e9d8fa0f618a0ae7a1c9f
Reviewed-on: https://go-review.googlesource.com/c/go/+/671875
Reviewed-by: sophie zhao <zhaoxiaolin@loongson.cn>
Reviewed-by: Meidan Li <limeidan@loongson.cn>
Reviewed-by: Cherry Mui <cherryyz@google.com>
LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
Reviewed-by: Michael Knyszek <mknyszek@google.com>
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Go asm syntax:
VFCLASS{F/D} VJ, VD
XVFCLASS{F/D} XJ, XD
Equivalent platform assembler syntax:
vfclass.{s/d} vd, vj
xvfclass.{s/d} xd, xj
Change-Id: Iec373f393be315696d1fefc747a4a5882f993195
Reviewed-on: https://go-review.googlesource.com/c/go/+/670256
Reviewed-by: Cherry Mui <cherryyz@google.com>
Reviewed-by: Dustin Turner <dustin.turner44@gmail.com>
LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
Reviewed-by: Carlos Amedee <carlos@golang.org>
Reviewed-by: abner chenc <chenguoqi@loongson.cn>
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Go asm syntax:
V{ADD/SUB/MUL/DIV}{F/D} VK, VJ, VD
XV{ADD/SUB/MUL/DIV}{F/D} XK, XJ, XD
Equivalent platform assembler syntax:
vf{add/sub/mul/div}.{s/d} vd, vj, vk
xvf{add/sub/mul/div}.{s/d} xd, xj, xk
Change-Id: I4607884212167ac97d7b6448ea3c849fc0fdd506
Reviewed-on: https://go-review.googlesource.com/c/go/+/670255
Reviewed-by: abner chenc <chenguoqi@loongson.cn>
Reviewed-by: Carlos Amedee <carlos@golang.org>
LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
Reviewed-by: Cherry Mui <cherryyz@google.com>
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The RISC-V Instruction Set Manual Volume states that "for vadc and
vsbc, the instruction encoding is reserved if the destination vector
register is v0". The assembler currently allows instructions like
VADCVVM V1, V2, V0, V0
to be assembled. It's not clear what the behaviour of such
instructions will be on target hardware so it's best to disallow
them.
For reference, binutils (2.44-3.fc42) allows the instruction
vadc.vvm v0, v4, v8, v0
to be assembled and the instruction actually executes on a Banana PI
F3 without crashing. However, clang (20.1.2) refuses to assemble the
instruction, producing the following error.
error: the destination vector register group cannot be V0
vadc.vvm v0, v4, v8, v0
^
Change-Id: Ia913cbd864ae8dbcf9227f69b963c93a99481cff
Reviewed-on: https://go-review.googlesource.com/c/go/+/669315
Reviewed-by: Carlos Amedee <carlos@golang.org>
LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
Reviewed-by: Cherry Mui <cherryyz@google.com>
Reviewed-by: Joel Sing <joel@sing.id.au>
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The encodings for the riscv64 special operands SPOP_MF2 and SPOP_MF8
are incorrect, i.e., their values are swapped. This leads to
incorrect encodings for the VSETVLI and VSETIVLI instructions. The
assembler currently encodes
VSETVLI X10, E32, MF8, TA, MA, X12
as
VSETVLI X10, E32, MF2, TA, MA, X12
We update the encodings for SPOP_MF2 and SPOP_MF8 so that they match
the LMUL table in section "31.3.4. Vector type register, vtype" of
the "RISC-V Instruction Set Manual Volume 1".
Change-Id: Ic73355533d7c2a901ee060b35c2f7af6d58453e4
Reviewed-on: https://go-review.googlesource.com/c/go/+/670016
LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
Reviewed-by: Cherry Mui <cherryyz@google.com>
Reviewed-by: Carlos Amedee <carlos@golang.org>
Reviewed-by: Meng Zhuo <mengzhuo1203@gmail.com>
Reviewed-by: Joel Sing <joel@sing.id.au>
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Go asm syntax:
VFRINT[{RNE/RZ/RP/RM}]{F/D} VJ, VD
XVFRINT[{RNE/RZ/RP/RM}]{F/D} XJ, XD
Equivalent platform assembler syntax:
vfrint[{rne/rz/rp/rm}].{s/d} vd, vj
xvfrint[{rne/rz/rp/rm}].{s/d} xd, xj
Change-Id: I4ed8782289ae3329d675239f799d5f75b1adc4ad
Reviewed-on: https://go-review.googlesource.com/c/go/+/670235
Reviewed-by: abner chenc <chenguoqi@loongson.cn>
Reviewed-by: Cherry Mui <cherryyz@google.com>
LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
Reviewed-by: Carlos Amedee <carlos@golang.org>
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This reverts commits
3f3782feed6e0726ddb08afd32dad7d94fbb38c6 (CL 648518)
b386b628521780c048af14a148f373c84e687b26 (CL 668475)
Fixes #73542
Change-Id: I218851c5c0b62700281feb0b3f82b6b9b97b910d
Reviewed-on: https://go-review.googlesource.com/c/go/+/670055
Reviewed-by: Keith Randall <khr@google.com>
Auto-Submit: Keith Randall <khr@golang.org>
Reviewed-by: Cherry Mui <cherryyz@google.com>
LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
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Add support for vector permutation instructions to the RISC-V assembler.
This includes integer scalar move, floating point scalar move, slide up
and slide down, register gather, compression and whole vector register
move instructions.
Change-Id: I1da9f393091504fd81714006355725b8b9ecadea
Reviewed-on: https://go-review.googlesource.com/c/go/+/646780
LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
Reviewed-by: Carlos Amedee <carlos@golang.org>
Reviewed-by: Mark Ryan <markdryan@rivosinc.com>
Reviewed-by: Junyang Shao <shaojunyang@google.com>
Reviewed-by: Meng Zhuo <mengzhuo1203@gmail.com>
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Add support for vector mask instructions to the RISC-V assembler.
These allow manipulation of vector masks and include mask register
logical instructions, population count and find-first bit set
instructions.
Change-Id: I3ab3aa0f918338aee9b37ac5a2b2fdc407875072
Reviewed-on: https://go-review.googlesource.com/c/go/+/646779
Reviewed-by: Carlos Amedee <carlos@golang.org>
Reviewed-by: Meng Zhuo <mengzhuo1203@gmail.com>
LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
Reviewed-by: Mark Ryan <markdryan@rivosinc.com>
Reviewed-by: Junyang Shao <shaojunyang@google.com>
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Add support for vector reduction instructions to the RISC-V assembler,
including single-width integer reduction, widening integer reduction,
single-width floating-point reduction and widening floating-point
reduction.
Change-Id: I8f17bef11389f3a017e0430275023fc5d75936e3
Reviewed-on: https://go-review.googlesource.com/c/go/+/646778
Reviewed-by: Meng Zhuo <mengzhuo1203@gmail.com>
Reviewed-by: Mark Ryan <markdryan@rivosinc.com>
LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
Reviewed-by: Carlos Amedee <carlos@golang.org>
Reviewed-by: Dmitri Shuralyov <dmitshur@google.com>
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