cmd: remove dead code

Fixes #74076

Change-Id: Icc67b3d4e342f329584433bd1250c56ae8f5a73d
Reviewed-on: https://go-review.googlesource.com/c/go/+/690635
Reviewed-by: Alan Donovan <adonovan@google.com>
LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
Commit-Queue: Alan Donovan <adonovan@google.com>
Reviewed-by: Keith Randall <khr@golang.org>
Reviewed-by: Keith Randall <khr@google.com>
Auto-Submit: Alan Donovan <adonovan@google.com>
Reviewed-by: Dmitri Shuralyov <dmitshur@google.com>

8 files changed, 0 insertions, 170 deletions

diff --git a/src/cmd/internal/obj/arm64/asm7.go b/src/cmd/internal/obj/arm64/asm7.go
index 344b73e658..0c9c70aa89 100644
--- a/src/cmd/internal/obj/arm64/asm7.go
+++ b/src/cmd/internal/obj/arm64/asm7.go
@@ -1054,15 +1054,6 @@ var sysInstFields = map[SpecialOperand]struct {
 // Used for padding NOOP instruction
 const OP_NOOP = 0xd503201f
 
-// pcAlignPadLength returns the number of bytes required to align pc to alignedValue,
-// reporting an error if alignedValue is not a power of two or is out of range.
-func pcAlignPadLength(ctxt *obj.Link, pc int64, alignedValue int64) int {
-	if !((alignedValue&(alignedValue-1) == 0) && 8 <= alignedValue && alignedValue <= 2048) {
-		ctxt.Diag("alignment value of an instruction must be a power of two and in the range [8, 2048], got %d\n", alignedValue)
-	}
-	return int(-pc & (alignedValue - 1))
-}
-
 // size returns the size of the sequence of machine instructions when p is encoded with o.
 // Usually it just returns o.size directly, in some cases it checks whether the optimization
 // conditions are met, and if so returns the size of the optimized instruction sequence.
@@ -1209,10 +1200,6 @@ type codeBuffer struct {
 	data *[]byte
 }
 
-func (cb *codeBuffer) pc() int64 {
-	return int64(len(*cb.data))
-}
-
 // Write a sequence of opcodes into the code buffer.
 func (cb *codeBuffer) emit(op ...uint32) {
 	for _, o := range op {
diff --git a/src/cmd/internal/obj/loong64/asm.go b/src/cmd/internal/obj/loong64/asm.go
index 2ed12698e6..0d1b202e80 100644
--- a/src/cmd/internal/obj/loong64/asm.go
+++ b/src/cmd/internal/obj/loong64/asm.go
@@ -729,10 +729,6 @@ func isint32(v int64) bool {
 	return int64(int32(v)) == v
 }
 
-func isuint32(v uint64) bool {
-	return uint64(uint32(v)) == v
-}
-
 func (c *ctxt0) aclass(a *obj.Addr) int {
 	switch a.Type {
 	case obj.TYPE_NONE:
diff --git a/src/cmd/internal/obj/loong64/obj.go b/src/cmd/internal/obj/loong64/obj.go
index 79fbb23fef..a1eb786da3 100644
--- a/src/cmd/internal/obj/loong64/obj.go
+++ b/src/cmd/internal/obj/loong64/obj.go
@@ -771,14 +771,6 @@ func (c *ctxt0) stacksplit(p *obj.Prog, framesize int32) *obj.Prog {
 	return end
 }
 
-func (c *ctxt0) addnop(p *obj.Prog) {
-	q := c.newprog()
-	q.As = ANOOP
-	q.Pos = p.Pos
-	q.Link = p.Link
-	p.Link = q
-}
-
 var Linkloong64 = obj.LinkArch{
 	Arch:           sys.ArchLoong64,
 	Init:           buildop,
diff --git a/src/cmd/internal/obj/ppc64/asm9.go b/src/cmd/internal/obj/ppc64/asm9.go
index 9cba8c33ce..dcd3aa59a4 100644
--- a/src/cmd/internal/obj/ppc64/asm9.go
+++ b/src/cmd/internal/obj/ppc64/asm9.go
@@ -2137,10 +2137,6 @@ func OPVCC(o uint32, xo uint32, oe uint32, rc uint32) uint32 {
 	return o<<26 | xo<<1 | oe<<10 | rc&1
 }
 
-func OPCC(o uint32, xo uint32, rc uint32) uint32 {
-	return OPVCC(o, xo, 0, rc)
-}
-
 /* Generate MD-form opcode */
 func OPMD(o, xo, rc uint32) uint32 {
 	return o<<26 | xo<<2 | rc&1
diff --git a/src/cmd/internal/obj/riscv/obj.go b/src/cmd/internal/obj/riscv/obj.go
index 078e81a2f7..44edb8d841 100644
--- a/src/cmd/internal/obj/riscv/obj.go
+++ b/src/cmd/internal/obj/riscv/obj.go
@@ -1072,24 +1072,6 @@ func regV(r uint32) uint32 {
 	return regVal(r, REG_V0, REG_V31)
 }
 
-// regAddr extracts a register from an Addr.
-func regAddr(a obj.Addr, min, max uint32) uint32 {
-	if a.Type != obj.TYPE_REG {
-		panic(fmt.Sprintf("ill typed: %+v", a))
-	}
-	return regVal(uint32(a.Reg), min, max)
-}
-
-// regIAddr extracts the integer register from an Addr.
-func regIAddr(a obj.Addr) uint32 {
-	return regAddr(a, REG_X0, REG_X31)
-}
-
-// regFAddr extracts the float register from an Addr.
-func regFAddr(a obj.Addr) uint32 {
-	return regAddr(a, REG_F0, REG_F31)
-}
-
 // immEven checks that the immediate is a multiple of two. If it
 // is not, an error is returned.
 func immEven(x int64) error {
diff --git a/src/cmd/internal/obj/s390x/asmz.go b/src/cmd/internal/obj/s390x/asmz.go
index 957222a155..97de5a4a08 100644
--- a/src/cmd/internal/obj/s390x/asmz.go
+++ b/src/cmd/internal/obj/s390x/asmz.go
@@ -2677,20 +2677,6 @@ func (c *ctxtz) addrilreloc(sym *obj.LSym, add int64) {
 	})
 }
 
-func (c *ctxtz) addrilrelocoffset(sym *obj.LSym, add, offset int64) {
-	if sym == nil {
-		c.ctxt.Diag("require symbol to apply relocation")
-	}
-	offset += int64(2) // relocation offset from start of instruction
-	c.cursym.AddRel(c.ctxt, obj.Reloc{
-		Type: objabi.R_PCRELDBL,
-		Off:  int32(c.pc + offset),
-		Siz:  4,
-		Sym:  sym,
-		Add:  add + offset + 4,
-	})
-}
-
 // Add a CALL relocation for the immediate in a RIL style instruction.
 // The addend will be adjusted as required.
 func (c *ctxtz) addcallreloc(sym *obj.LSym, add int64) {
@@ -4745,16 +4731,6 @@ func zI(op, i1 uint32, asm *[]byte) {
 	*asm = append(*asm, uint8(op>>8), uint8(i1))
 }
 
-func zMII(op, m1, ri2, ri3 uint32, asm *[]byte) {
-	*asm = append(*asm,
-		uint8(op>>8),
-		(uint8(m1)<<4)|uint8((ri2>>8)&0x0F),
-		uint8(ri2),
-		uint8(ri3>>16),
-		uint8(ri3>>8),
-		uint8(ri3))
-}
-
 func zRI(op, r1_m1, i2_ri2 uint32, asm *[]byte) {
 	*asm = append(*asm,
 		uint8(op>>8),
@@ -4807,16 +4783,6 @@ func zRIL(f form, op, r1_m1, i2_ri2 uint32, asm *[]byte) {
 		uint8(i2_ri2))
 }
 
-func zRIS(op, r1, m3, b4, d4, i2 uint32, asm *[]byte) {
-	*asm = append(*asm,
-		uint8(op>>8),
-		(uint8(r1)<<4)|uint8(m3&0x0F),
-		(uint8(b4)<<4)|(uint8(d4>>8)&0x0F),
-		uint8(d4),
-		uint8(i2),
-		uint8(op))
-}
-
 func zRR(op, r1, r2 uint32, asm *[]byte) {
 	*asm = append(*asm, uint8(op>>8), (uint8(r1)<<4)|uint8(r2&0x0F))
 }
@@ -4845,16 +4811,6 @@ func zRRF(op, r3_m3, m4, r1, r2 uint32, asm *[]byte) {
 		(uint8(r1)<<4)|uint8(r2&0x0F))
 }
 
-func zRRS(op, r1, r2, b4, d4, m3 uint32, asm *[]byte) {
-	*asm = append(*asm,
-		uint8(op>>8),
-		(uint8(r1)<<4)|uint8(r2&0x0F),
-		(uint8(b4)<<4)|uint8((d4>>8)&0x0F),
-		uint8(d4),
-		uint8(m3)<<4,
-		uint8(op))
-}
-
 func zRS(op, r1, r3_m3, b2, d2 uint32, asm *[]byte) {
 	*asm = append(*asm,
 		uint8(op>>8),
@@ -4863,23 +4819,6 @@ func zRS(op, r1, r3_m3, b2, d2 uint32, asm *[]byte) {
 		uint8(d2))
 }
 
-func zRSI(op, r1, r3, ri2 uint32, asm *[]byte) {
-	*asm = append(*asm,
-		uint8(op>>8),
-		(uint8(r1)<<4)|uint8(r3&0x0F),
-		uint8(ri2>>8),
-		uint8(ri2))
-}
-
-func zRSL(op, l1, b2, d2 uint32, asm *[]byte) {
-	*asm = append(*asm,
-		uint8(op>>8),
-		uint8(l1),
-		(uint8(b2)<<4)|uint8((d2>>8)&0x0F),
-		uint8(d2),
-		uint8(op))
-}
-
 func zRSY(op, r1, r3_m3, b2, d2 uint32, asm *[]byte) {
 	dl2 := uint16(d2) & 0x0FFF
 	*asm = append(*asm,
@@ -4909,16 +4848,6 @@ func zRXE(op, r1, x2, b2, d2, m3 uint32, asm *[]byte) {
 		uint8(op))
 }
 
-func zRXF(op, r3, x2, b2, d2, m1 uint32, asm *[]byte) {
-	*asm = append(*asm,
-		uint8(op>>8),
-		(uint8(r3)<<4)|uint8(x2&0x0F),
-		(uint8(b2)<<4)|uint8((d2>>8)&0x0F),
-		uint8(d2),
-		uint8(m1)<<4,
-		uint8(op))
-}
-
 func zRXY(op, r1_m1, x2, b2, d2 uint32, asm *[]byte) {
 	dl2 := uint16(d2) & 0x0FFF
 	*asm = append(*asm,
@@ -4967,16 +4896,6 @@ func zSIY(op, i2, b1, d1 uint32, asm *[]byte) {
 		uint8(op))
 }
 
-func zSMI(op, m1, b3, d3, ri2 uint32, asm *[]byte) {
-	*asm = append(*asm,
-		uint8(op>>8),
-		uint8(m1)<<4,
-		(uint8(b3)<<4)|uint8((d3>>8)&0x0F),
-		uint8(d3),
-		uint8(ri2>>8),
-		uint8(ri2))
-}
-
 // Expected argument values for the instruction formats.
 //
 // Format    a1  a2  a3  a4  a5  a6
@@ -5006,26 +4925,6 @@ func zSS(f form, op, l1_r1, l2_i3_r3, b1_b2, d1_d2, b2_b4, d2_d4 uint32, asm *[]
 		uint8(d2_d4))
 }
 
-func zSSE(op, b1, d1, b2, d2 uint32, asm *[]byte) {
-	*asm = append(*asm,
-		uint8(op>>8),
-		uint8(op),
-		(uint8(b1)<<4)|uint8((d1>>8)&0x0F),
-		uint8(d1),
-		(uint8(b2)<<4)|uint8((d2>>8)&0x0F),
-		uint8(d2))
-}
-
-func zSSF(op, r3, b1, d1, b2, d2 uint32, asm *[]byte) {
-	*asm = append(*asm,
-		uint8(op>>8),
-		(uint8(r3)<<4)|(uint8(op)&0x0F),
-		(uint8(b1)<<4)|uint8((d1>>8)&0x0F),
-		uint8(d1),
-		(uint8(b2)<<4)|uint8((d2>>8)&0x0F),
-		uint8(d2))
-}
-
 func rxb(va, vb, vc, vd uint32) uint8 {
 	mask := uint8(0)
 	if va >= REG_V16 && va <= REG_V31 {
diff --git a/src/cmd/internal/obj/x86/asm6.go b/src/cmd/internal/obj/x86/asm6.go
index 3332134141..0906f16eaa 100644
--- a/src/cmd/internal/obj/x86/asm6.go
+++ b/src/cmd/internal/obj/x86/asm6.go
@@ -2037,23 +2037,6 @@ type nopPad struct {
 	n int32     // Size of the pad
 }
 
-// requireAlignment ensures that the function alignment is at
-// least as high as a, which should be a power of two
-// and between 8 and 2048, inclusive.
-//
-// the boolean result indicates whether the alignment meets those constraints
-func requireAlignment(a int64, ctxt *obj.Link, cursym *obj.LSym) bool {
-	if !((a&(a-1) == 0) && 8 <= a && a <= 2048) {
-		ctxt.Diag("alignment value of an instruction must be a power of two and in the range [8, 2048], got %d\n", a)
-		return false
-	}
-	// By default function alignment is 32 bytes for amd64
-	if cursym.Func().Align < int32(a) {
-		cursym.Func().Align = int32(a)
-	}
-	return true
-}
-
 func span6(ctxt *obj.Link, s *obj.LSym, newprog obj.ProgAlloc) {
 	if ctxt.Retpoline && ctxt.Arch.Family == sys.I386 {
 		ctxt.Diag("-spectre=ret not supported on 386")
diff --git a/src/cmd/internal/obj/x86/obj6.go b/src/cmd/internal/obj/x86/obj6.go
index 7f308686c1..48287546b3 100644
--- a/src/cmd/internal/obj/x86/obj6.go
+++ b/src/cmd/internal/obj/x86/obj6.go
@@ -852,11 +852,6 @@ func isZeroArgRuntimeCall(s *obj.LSym) bool {
 	return false
 }
 
-func indir_cx(ctxt *obj.Link, a *obj.Addr) {
-	a.Type = obj.TYPE_MEM
-	a.Reg = REG_CX
-}
-
 // loadG ensures the G is loaded into a register (either CX or REGG),
 // appending instructions to p if necessary. It returns the new last
 // instruction and the G register.