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| author | Guoqi Chen <chenguoqi@loongson.cn> | 2026-02-06 10:09:10 +0800 |
|---|---|---|
| committer | abner chenc <chenguoqi@loongson.cn> | 2026-02-14 07:17:33 -0800 |
| commit | 6837583eec31bf197a8f16bcb431e3beb73b2aa5 (patch) | |
| tree | 011e8ab7386396d4dc4703effb6cf7b02cdd85dd /src/cmd/asm | |
| parent | c01d1f095bd8897b7bf4d9e07bd588134952e047 (diff) | |
| download | go-6837583eec31bf197a8f16bcb431e3beb73b2aa5.tar.xz | |
cmd/internal/obj/loong64: improve ARNG type register name conversion
When resolving ARNG type names, the base value was not subtracted
when calculating the variable simd_type, causing its actual value
to not match the expected meaning after the base value adjustment.
Fixes #77414
Change-Id: I713bab849ecdb5610d2593ba9bd9e1169842f00e
Reviewed-on: https://go-review.googlesource.com/c/go/+/742980
LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
Reviewed-by: WANG Xuerui <git@xen0n.name>
Reviewed-by: Michael Pratt <mpratt@google.com>
Reviewed-by: Junyang Shao <shaojunyang@google.com>
Reviewed-by: Meidan Li <limeidan@loongson.cn>
Diffstat (limited to 'src/cmd/asm')
| -rw-r--r-- | src/cmd/asm/internal/arch/loong64.go | 31 |
1 files changed, 17 insertions, 14 deletions
diff --git a/src/cmd/asm/internal/arch/loong64.go b/src/cmd/asm/internal/arch/loong64.go index 21263d3433..4f62f5210b 100644 --- a/src/cmd/asm/internal/arch/loong64.go +++ b/src/cmd/asm/internal/arch/loong64.go @@ -75,48 +75,51 @@ var loong64LasxArngExtMap = map[string]int16{ // Loong64RegisterExtension constructs an Loong64 register with extension or arrangement. func Loong64RegisterExtension(a *obj.Addr, ext string, reg, num int16, isAmount, isIndex bool) error { var ok bool - var arng_type int16 - var simd_type int16 + var arngType int16 + var simdType int16 + var simdReg int16 switch { case reg >= loong64.REG_V0 && reg <= loong64.REG_V31: - simd_type = loong64.LSX + simdType = loong64.LSX + simdReg = reg - loong64.REG_V0 case reg >= loong64.REG_X0 && reg <= loong64.REG_X31: - simd_type = loong64.LASX + simdType = loong64.LASX + simdReg = reg - loong64.REG_X0 default: return errors.New("Loong64 extension: invalid LSX/LASX register: " + fmt.Sprintf("%d", reg)) } if isIndex { - arng_type, ok = loong64ElemExtMap[ext] + arngType, ok = loong64ElemExtMap[ext] if !ok { return errors.New("Loong64 extension: invalid LSX/LASX arrangement type: " + ext) } a.Reg = loong64.REG_ELEM - a.Reg += ((reg & loong64.EXT_REG_MASK) << loong64.EXT_REG_SHIFT) - a.Reg += ((arng_type & loong64.EXT_TYPE_MASK) << loong64.EXT_TYPE_SHIFT) - a.Reg += ((simd_type & loong64.EXT_SIMDTYPE_MASK) << loong64.EXT_SIMDTYPE_SHIFT) + a.Reg += ((simdReg & loong64.EXT_REG_MASK) << loong64.EXT_REG_SHIFT) + a.Reg += ((arngType & loong64.EXT_TYPE_MASK) << loong64.EXT_TYPE_SHIFT) + a.Reg += ((simdType & loong64.EXT_SIMDTYPE_MASK) << loong64.EXT_SIMDTYPE_SHIFT) a.Index = num } else { - switch simd_type { + switch simdType { case loong64.LSX: - arng_type, ok = loong64LsxArngExtMap[ext] + arngType, ok = loong64LsxArngExtMap[ext] if !ok { return errors.New("Loong64 extension: invalid LSX arrangement type: " + ext) } case loong64.LASX: - arng_type, ok = loong64LasxArngExtMap[ext] + arngType, ok = loong64LasxArngExtMap[ext] if !ok { return errors.New("Loong64 extension: invalid LASX arrangement type: " + ext) } } a.Reg = loong64.REG_ARNG - a.Reg += ((reg & loong64.EXT_REG_MASK) << loong64.EXT_REG_SHIFT) - a.Reg += ((arng_type & loong64.EXT_TYPE_MASK) << loong64.EXT_TYPE_SHIFT) - a.Reg += ((simd_type & loong64.EXT_SIMDTYPE_MASK) << loong64.EXT_SIMDTYPE_SHIFT) + a.Reg += ((simdReg & loong64.EXT_REG_MASK) << loong64.EXT_REG_SHIFT) + a.Reg += ((arngType & loong64.EXT_TYPE_MASK) << loong64.EXT_TYPE_SHIFT) + a.Reg += ((simdType & loong64.EXT_SIMDTYPE_MASK) << loong64.EXT_SIMDTYPE_SHIFT) } return nil |