diff options
| author | Joel Sing <joel@sing.id.au> | 2019-09-19 03:53:50 +1000 |
|---|---|---|
| committer | Joel Sing <joel@sing.id.au> | 2019-09-26 17:37:02 +0000 |
| commit | a37f2b4f60aef93fec1911eeac43c33dc5ff1857 (patch) | |
| tree | d90a1061b87d570f754ac2a7fece7c94508dde95 /src/cmd/asm/internal | |
| parent | 430d2aa3493c3a057f83af886cd866291cbf04ea (diff) | |
| download | go-a37f2b4f60aef93fec1911eeac43c33dc5ff1857.tar.xz | |
cmd/internal/obj/riscv: implement control transfer instructions
Add support for assembling control transfer instructions.
Based on the riscv-go port.
Updates #27532
Change-Id: I205d3ccd0a48deeaace0f20fca8516f382a83fae
Reviewed-on: https://go-review.googlesource.com/c/go/+/196841
Reviewed-by: Cherry Zhang <cherryyz@google.com>
Run-TryBot: Cherry Zhang <cherryyz@google.com>
TryBot-Result: Gobot Gobot <gobot@golang.org>
Diffstat (limited to 'src/cmd/asm/internal')
| -rw-r--r-- | src/cmd/asm/internal/asm/testdata/riscvenc.s | 18 |
1 files changed, 17 insertions, 1 deletions
diff --git a/src/cmd/asm/internal/asm/testdata/riscvenc.s b/src/cmd/asm/internal/asm/testdata/riscvenc.s index c58bb0fe07..11fe827ec6 100644 --- a/src/cmd/asm/internal/asm/testdata/riscvenc.s +++ b/src/cmd/asm/internal/asm/testdata/riscvenc.s @@ -5,7 +5,7 @@ #include "../../../../../runtime/textflag.h" TEXT asmtest(SB),DUPOK|NOSPLIT,$0 - +start: // Unprivileged ISA // 2.4: Integer Computational Instructions @@ -83,6 +83,22 @@ TEXT asmtest(SB),DUPOK|NOSPLIT,$0 SRA $1, X5, X6 // 13d31240 SRA $1, X5 // 93d21240 + // 2.5: Control Transfer Instructions + + // These jumps and branches get printed as a jump or branch + // to 2 because they transfer control to the second instruction + // in the function (the first instruction being an invisible + // stack pointer adjustment). + JAL X5, start // JAL X5, 2 // eff2dff0 + JALR X6, (X5) // 67830200 + JALR X6, 4(X5) // 67834200 + BEQ X5, X6, start // BEQ X5, X6, 2 // e38062f0 + BNE X5, X6, start // BNE X5, X6, 2 // e39e62ee + BLT X5, X6, start // BLT X5, X6, 2 // e3cc62ee + BLTU X5, X6, start // BLTU X5, X6, 2 // e3ea62ee + BGE X5, X6, start // BGE X5, X6, 2 // e3d862ee + BGEU X5, X6, start // BGEU X5, X6, 2 // e3f662ee + // 2.6: Load and Store Instructions LW $0, X5, X6 // 03a30200 LW $4, X5, X6 // 03a34200 |