diff options
| author | Joel Sing <joel@sing.id.au> | 2019-09-19 02:34:06 +1000 |
|---|---|---|
| committer | Joel Sing <joel@sing.id.au> | 2019-09-26 17:34:54 +0000 |
| commit | 430d2aa3493c3a057f83af886cd866291cbf04ea (patch) | |
| tree | 226601b7bfc335cd866c444cfb7b807cc71011b6 /src/cmd/asm/internal | |
| parent | 05c8d8d3655b92ea6608f8f9ff47d85b74b67e94 (diff) | |
| download | go-430d2aa3493c3a057f83af886cd866291cbf04ea.tar.xz | |
cmd/internal/obj/riscv: implement AUIPC and LUI instructions
Add support for assembling AUIPC and LUI instructions.
Based on the riscv-go port.
Updates #27532
Change-Id: I178868b6dcc6fdc6b8527454569a3538ed50723e
Reviewed-on: https://go-review.googlesource.com/c/go/+/196840
Reviewed-by: Cherry Zhang <cherryyz@google.com>
Run-TryBot: Cherry Zhang <cherryyz@google.com>
TryBot-Result: Gobot Gobot <gobot@golang.org>
Diffstat (limited to 'src/cmd/asm/internal')
| -rw-r--r-- | src/cmd/asm/internal/asm/testdata/riscvenc.s | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/src/cmd/asm/internal/asm/testdata/riscvenc.s b/src/cmd/asm/internal/asm/testdata/riscvenc.s index f0d31fda87..c58bb0fe07 100644 --- a/src/cmd/asm/internal/asm/testdata/riscvenc.s +++ b/src/cmd/asm/internal/asm/testdata/riscvenc.s @@ -57,6 +57,15 @@ TEXT asmtest(SB),DUPOK|NOSPLIT,$0 XOR $1, X5, X6 // 13c31200 XOR $1, X5 // 93c21200 + AUIPC $0, X10 // 17050000 + AUIPC $0, X11 // 97050000 + AUIPC $1, X10 // 17150000 + AUIPC $1048575, X10 // 17f5ffff + + LUI $0, X15 // b7070000 + LUI $167, X15 // b7770a00 + LUI $1048575, X15 // b7f7ffff + SLL X6, X5, X7 // b3936200 SLL X5, X6 // 33135300 SLL $1, X5, X6 // 13931200 |