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path: root/src/cmd/internal/obj/ppc64/asm9.go
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2026-02-10cmd/internal/obj: add Align field to LSymIan Lance Taylor
This will permit the compiler and assembler to specify the alignment of symbols that they create. Careful placement of the new field, plus rearranging an existing field, means that LSym does not change size (as tested by TestSizeof). The new alignment field is int16, permitting alignment up to 16384, more than we ever need in practice. If necessary we could change the field to uint8 and store the alignment as a power of two, as is done in the linker. This replaces the Align field in FuncInfo. For #6853 For #36313 Change-Id: I421e8238ab57958fea8e4eab0649ce5288e7f92f Reviewed-on: https://go-review.googlesource.com/c/go/+/727020 LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: Keith Randall <khr@golang.org> Auto-Submit: Ian Lance Taylor <iant@golang.org> Reviewed-by: Cherry Mui <cherryyz@google.com> Reviewed-by: Keith Randall <khr@google.com>
2025-10-21all: eliminate unnecessary type conversionsJes Cok
Found by github.com/mdempsky/unconvert Change-Id: I88ce10390a49ba768a4deaa0df9057c93c1164de GitHub-Last-Rev: 3b0f7e8f74f58340637f33287c238765856b2483 GitHub-Pull-Request: golang/go#75974 Reviewed-on: https://go-review.googlesource.com/c/go/+/712940 LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: Keith Randall <khr@golang.org> Auto-Submit: Keith Randall <khr@golang.org> Reviewed-by: Keith Randall <khr@google.com> Reviewed-by: David Chase <drchase@google.com>
2025-08-05cmd: remove dead codeqiulaidongfeng
Fixes #74076 Change-Id: Icc67b3d4e342f329584433bd1250c56ae8f5a73d Reviewed-on: https://go-review.googlesource.com/c/go/+/690635 Reviewed-by: Alan Donovan <adonovan@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Commit-Queue: Alan Donovan <adonovan@google.com> Reviewed-by: Keith Randall <khr@golang.org> Reviewed-by: Keith Randall <khr@google.com> Auto-Submit: Alan Donovan <adonovan@google.com> Reviewed-by: Dmitri Shuralyov <dmitshur@google.com>
2024-11-21all: fix some function names and typos in commentcuishuang
Change-Id: I07e7c8eaa5bd4bac0d576b2f2f4cd3f81b0b77a4 Reviewed-on: https://go-review.googlesource.com/c/go/+/630055 LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Commit-Queue: Ian Lance Taylor <iant@google.com> Reviewed-by: Ian Lance Taylor <iant@google.com> Reviewed-by: Russ Cox <rsc@golang.org> Auto-Submit: Ian Lance Taylor <iant@google.com>
2024-11-21cmd/internal/obj/ppc64: support for decimal floating point instructionsJayanth Krishnamurthy jayanth.krishnamurthy@ibm.com
1. Support for decimal arithmetic quad instructions of powerpc: DADDQ, DSUBQ, DMULQ and DDIVQ. 2. Support for decimal compare ordered, unordered, quad instructions of powerpc: DCMPU, DCMPO, DCMPUQ, and DCMPOQ. Change-Id: I32a15a7f0a127b022b1f43d376e0ab0f7e9dd108 Cq-Include-Trybots: luci.golang.try:gotip-linux-ppc64_power10,gotip-linux-ppc64_power8,gotip-linux-ppc64le_power8,gotip-linux-ppc64le_power9,gotip-linux-ppc64le_power10 Reviewed-on: https://go-review.googlesource.com/c/go/+/623036 LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Auto-Submit: Paul Murphy <murp@ibm.com> Reviewed-by: Dmitri Shuralyov <dmitshur@google.com> Reviewed-by: Paul Murphy <murp@ibm.com> Reviewed-by: Cherry Mui <cherryyz@google.com>
2024-11-07cmd/internal/obj: replace obj.Addrel func with LSym.AddRel methodRuss Cox
The old API was to do r := obj.AddRel(sym) r.Type = this r.Off = that etc The new API is: sym.AddRel(ctxt, obj.Reloc{Type: this: Off: that, etc}) This new API is more idiomatic and avoids ever having relocations that are only partially constructed. Most importantly, it sets up for sym.AddRel being able to check relocation validity in the future. (Passing ctxt is for use in validity checking.) Passes golang.org/x/tools/cmd/toolstash/buildall. Change-Id: I042ea76e61bb3bf6402f98ca11291a13f4799972 Reviewed-on: https://go-review.googlesource.com/c/go/+/625616 LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: Cherry Mui <cherryyz@google.com>
2024-10-29cmd/internal/obj/ppc64: support for extended mnemonics of BCJayanth Krishnamurthy
BGT, BLT, BLE, BGE, BNE, BVS, BVC, and BEQ support by assembler. This will simplify the usage of BC constructs like BC 12, 30, LR <=> BEQ CR7, LR BC 12, 2, LR <=> BEQ CR0, LR BC 12, 0, target <=> BLT CR0, target BC 12, 2, target <=> BEQ CR0, target BC 12, 5, target <=> BGT CR1, target BC 12, 30, target <=> BEQ CR7, target BC 4, 6, target <=> BNE CR1, target BC 4, 5, target <=> BLE CR1, target code cleanup based on the above additions. Change-Id: I02fdb212b6fe3f85ce447e05f4d42118c9ce63b5 Cq-Include-Trybots: luci.golang.try:gotip-linux-ppc64_power10,gotip-linux-ppc64_power8,gotip-linux-ppc64le_power8,gotip-linux-ppc64le_power9,gotip-linux-ppc64le_power10 Reviewed-on: https://go-review.googlesource.com/c/go/+/612395 LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: Paul Murphy <murp@ibm.com> Reviewed-by: Carlos Amedee <carlos@golang.org> Reviewed-by: Dmitri Shuralyov <dmitshur@google.com> Reviewed-by: Michael Pratt <mpratt@google.com>
2024-10-29cmd/internal/obj/ppc64: add double-decimal arithmetic instructionsJayanth Krishnamurthy
Assembler support provided for the instructions DADD, DSUB, DMUL, and DDIV. Change-Id: Ic12ba02ce453cb1ca275334ca1924fb2009da767 Reviewed-on: https://go-review.googlesource.com/c/go/+/620856 LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: Paul Murphy <murp@ibm.com> Reviewed-by: Carlos Amedee <carlos@golang.org> Reviewed-by: Dmitri Shuralyov <dmitshur@google.com>
2024-05-15cmd/compile,cmd/asm: on PPC64, generate compares against constant 0Paul E. Murphy
Merge the handling of CMPx r,r,cr and CMPx r,i,cr when assembling. This prevents generating machine code like cmpd rx,r0 when cmpdi rx,0 is preferred. The preferred form can be fused on Power10 for faster execution of some instruction sequences. Likewise, update a common case to use $0 instead of R0 to take advantage of this. Change-Id: If2549ca25a5f7d23001885ad444c70d829b3b066 Cq-Include-Trybots: luci.golang.try:gotip-linux-ppc64_power10,gotip-linux-ppc64_power8,gotip-linux-ppc64le_power10,gotip-linux-ppc64le_power8,gotip-linux-ppc64le_power9 Reviewed-on: https://go-review.googlesource.com/c/go/+/585137 Reviewed-by: Dmitri Shuralyov <dmitshur@google.com> Reviewed-by: Lynn Boger <laboger@linux.vnet.ibm.com> Reviewed-by: Cherry Mui <cherryyz@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2024-04-01cmd/compile: support float min/max instructions on PPC64Paul E. Murphy
This enables efficient use of the builtin min/max function for float64 and float32 types on GOPPC64 >= power9. Extend the assembler to support xsminjdp/xsmaxjdp and use them to implement float min/max. Simplify the VSX xx3 opcode rules to allow FPR arguments, if all arguments are an FPR. Change-Id: I15882a4ce5dc46eba71d683cf1d184dc4236a328 Reviewed-on: https://go-review.googlesource.com/c/go/+/574535 Reviewed-by: David Chase <drchase@google.com> Reviewed-by: Lynn Boger <laboger@linux.vnet.ibm.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> TryBot-Result: Gopher Robot <gobot@golang.org> Run-TryBot: Paul Murphy <murp@ibm.com> Reviewed-by: Than McIntosh <thanm@google.com>
2024-02-28cmd/internal/obj/ppc64: generate smaller machine code for OR/XOR of uint32 ↵Paul E. Murphy
values These binary operations can be done in two sequential instructions instead of loading a constant into REGTMP and doing the binary op. Change-Id: Ie0ab863f9e81afad140b92b265bca4d3f0fe90b1 Reviewed-on: https://go-review.googlesource.com/c/go/+/565215 Reviewed-by: Lynn Boger <laboger@linux.vnet.ibm.com> Reviewed-by: Carlos Amedee <carlos@golang.org> Reviewed-by: Michael Pratt <mpratt@google.com> TryBot-Result: Gopher Robot <gobot@golang.org> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Run-TryBot: Paul Murphy <murp@ibm.com>
2024-02-16cmd/internal/obj/ppc64: cleanup optab entries after renamingPaul E. Murphy
Combine MOVW/MOVD using C_16CON as they accept any 16 bit constant. Remove MULLW/MULLD C_U16CON optab entry. These assemble to the mulli opcode which only accepts a signed 16 bit constant. Remove superfluous optab entrys for VSPLTB and VSPLTISB, as C_S16CON accepts C_U15CON arguments. Change-Id: Ie20dd07bcedda428fb1dd674474d7dfa67d76dc1 Reviewed-on: https://go-review.googlesource.com/c/go/+/563915 LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: Than McIntosh <thanm@google.com> TryBot-Result: Gopher Robot <gobot@golang.org> Run-TryBot: Paul Murphy <murp@ibm.com> Reviewed-by: Lynn Boger <laboger@linux.vnet.ibm.com> Reviewed-by: Eli Bendersky <eliben@google.com>
2024-02-13cmd/internal/obj/ppc64: rename and remove aliased optab classifiersPaul E. Murphy
Rename C_LCON, C_SCON, C_ADDCON, C_ANDCON into their aliased names and remove them. Change-Id: I8f67cc973f8059e65b81669d91a44500fc136b0a Reviewed-on: https://go-review.googlesource.com/c/go/+/563097 Run-TryBot: Paul Murphy <murp@ibm.com> Reviewed-by: Lynn Boger <laboger@linux.vnet.ibm.com> Reviewed-by: Than McIntosh <thanm@google.com> Reviewed-by: David Chase <drchase@google.com> TryBot-Result: Gopher Robot <gobot@golang.org>
2024-02-09cmd/internal/obj/ppc64: add new constant optab classificationsPaul E. Murphy
Make C_S32CON, C_U32CON, and C_32CON distinct classifiers to allow more specific matching of 32 bit constants. C_U31CON is added to support C_S32CON. Likewise, add C_16CON which is the union of C_S16CON and C_U16CON classification. This wil allow simplifying MOVD/MOVW optab entries in a future patch. Change-Id: I193acc0ded8f3edd91d306e39c3e7e55a9811e04 Reviewed-on: https://go-review.googlesource.com/c/go/+/562346 Reviewed-by: Lynn Boger <laboger@linux.vnet.ibm.com> Reviewed-by: Michael Knyszek <mknyszek@google.com> Reviewed-by: David Chase <drchase@google.com> Reviewed-by: Than McIntosh <thanm@google.com> Run-TryBot: Paul Murphy <murp@ibm.com> TryBot-Result: Gopher Robot <gobot@golang.org>
2024-02-07cmd/internal/obj/ppc64: combine C_SBRA and C_LBRA optab classesPaul E. Murphy
The assembler treats C_SBRA and C_LBRA optab classes identically, combine them into one class to reduce the number of optab classes. Likewise, C_LBRAPIC is renamed to C_BRAPIC for consistency with the above change. Change-Id: I47000e7273cb8f89a4d0621d71433ccbfb7afb70 Reviewed-on: https://go-review.googlesource.com/c/go/+/557916 LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: Michael Knyszek <mknyszek@google.com> Reviewed-by: Lynn Boger <laboger@linux.vnet.ibm.com> Reviewed-by: David Chase <drchase@google.com>
2023-11-17cmd/internal/obj/ppc64: cleanup and remove usage of getimpliedregPaul E. Murphy
getimpliedreg was used to set a default register in cases where one was implied but not set by the assembler or compiler. In most cases with constant values, R0 is implied, and is the value 0 by architectural design. In those cases, R0 is always used, so treat 0 and REG_R0 as interchangeable in those encodings. Similarly, the pseudo-register SP or FP is used to in place of the stack pointer, always R1 on PPC64. Unconditionally set this during classification of NAME_AUTO and NAME_PARAM as it may be 0. The case where REGSB might be returned from getimpliedreg is never used. REGSB is aliased to R2, but in practice it is either R0 or R2 depending on buildmode. See symbolAccess in asm9.go for an example. Change-Id: I7283e66d5351f56a7fe04cee38714910eaa73cb3 Reviewed-on: https://go-review.googlesource.com/c/go/+/434775 Reviewed-by: Lynn Boger <laboger@linux.vnet.ibm.com> Reviewed-by: David Chase <drchase@google.com> Run-TryBot: Paul Murphy <murp@ibm.com> Reviewed-by: Than McIntosh <thanm@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> TryBot-Result: Gopher Robot <gobot@golang.org>
2023-11-17cmd/internal/obj/ppc64: remove unused C_XER optab classPaul E. Murphy
This halves the size of the xcmp lookup table. Change-Id: I543fb72709ca45c026e9b7d8084a78f2a8fcd43e Reviewed-on: https://go-review.googlesource.com/c/go/+/542295 Reviewed-by: David Chase <drchase@google.com> Run-TryBot: Paul Murphy <murp@ibm.com> Reviewed-by: Jayanth Krishnamurthy <jayanth.krishnamurthy@ibm.com> TryBot-Result: Gopher Robot <gobot@golang.org> Reviewed-by: Than McIntosh <thanm@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: Lynn Boger <laboger@linux.vnet.ibm.com>
2023-11-09cmd/internal/obj/ppc64: remove C_UCON optab matching classPaul E. Murphy
This optab matching rule was used to match signed 16 bit values shifted left by 16 bits. Unsigned 16 bit values greater than 0x7FFF<<16 were classified as C_U32CON which led to larger than necessary codegen. Instead, rewrite logical/arithmetic operations in the preprocessor pass to use the 16 bit shifted immediate operation (e.g ADDIS vs ADD). This simplifies the optab matching rules, while also minimizing codegen size for large unsigned values. Note, ADDIS sign-extends the constant argument, all others do not. For matching opcodes, this means: MOVD $is<<16,Rx becomes ADDIS $is,Rx or ORIS $is,Rx MOVW $is<<16,Rx becomes ADDIS $is,Rx ADD $is<<16,[Rx,]Ry becomes ADDIS $is[Rx,]Ry OR $is<<16,[Rx,]Ry becomes ORIS $is[Rx,]Ry XOR $is<<16,[Rx,]Ry becomes XORIS $is[Rx,]Ry Change-Id: I1a988d9f52517a04bb8dc2e41d7caf3d5fff867c Reviewed-on: https://go-review.googlesource.com/c/go/+/536735 LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Run-TryBot: Paul Murphy <murp@ibm.com> Reviewed-by: Heschi Kreinick <heschi@google.com> TryBot-Result: Gopher Robot <gobot@golang.org> Reviewed-by: Cherry Mui <cherryyz@google.com> Reviewed-by: Lynn Boger <laboger@linux.vnet.ibm.com>
2023-11-06cmd/internal/asm/ppc64: avoid generating exser nopsPaul E. Murphy
"OR $0, R31, R31" is the execution serializing nop called "exser" on ISA 3.1 processors such as Power10. In general, the "OR $0, Rx, Rx" where Rx != 0 form should be avoided unless used explicitly for the uarch side-effects. Change-Id: Id76e3a703c902676ba4a3ffb64dd90dad9a320bf Reviewed-on: https://go-review.googlesource.com/c/go/+/537855 TryBot-Result: Gopher Robot <gobot@golang.org> Reviewed-by: Lynn Boger <laboger@linux.vnet.ibm.com> Reviewed-by: Cherry Mui <cherryyz@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Run-TryBot: Paul Murphy <murp@ibm.com> Reviewed-by: Heschi Kreinick <heschi@google.com>
2023-10-20cmd/internal/obj/ppc64: refactor maskgenPaul E. Murphy
Refactor maskgen into decodeMask32. This is derived from from combining encodePPC64RotateMask and isWordRotateMask. Also, truncate me returned from decodeMask32/64 to be within range of [0,32/64). Change-Id: Ie9efff93d400b3066ac85276b1ad3c57c2fcf31b Reviewed-on: https://go-review.googlesource.com/c/go/+/536298 Reviewed-by: Dmitri Shuralyov <dmitshur@google.com> TryBot-Result: Gopher Robot <gobot@golang.org> Reviewed-by: Lynn Boger <laboger@linux.vnet.ibm.com> Run-TryBot: Paul Murphy <murp@ibm.com> Reviewed-by: Than McIntosh <thanm@google.com>
2023-10-18cmd/internal/obj/ppc64: refactor maskgen64 usagePaul E. Murphy
Converting and verifying a bitmask can be done much quicker and simpler. Since this touches the MD-form opcodes, cleanup their encoding too. Change-Id: I9b1c1fdc4c9622e489ff6cf8181c5b647afae7c9 Reviewed-on: https://go-review.googlesource.com/c/go/+/534017 Reviewed-by: Than McIntosh <thanm@google.com> TryBot-Result: Gopher Robot <gobot@golang.org> Run-TryBot: Paul Murphy <murp@ibm.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: Lynn Boger <laboger@linux.vnet.ibm.com> Reviewed-by: Dmitri Shuralyov <dmitshur@google.com>
2023-10-05cmd/internal/obj/ppc64: generate MOVD mask constants in registerPaul E. Murphy
Add a new form of RLDC which maps directly to the ISA definition of rldc: RLDC Rs, $sh, $mb, Ra. This is used to generate mask constants described below. Using MOVD $-1, Rx; RLDC Rx, $sh, $mb, Rx, any mask constant can be generated. A mask is a contiguous series of 1 bits, which may wrap. Change-Id: Ifcaae1114080ad58b5fdaa3e5fc9019e2051f282 Reviewed-on: https://go-review.googlesource.com/c/go/+/531120 Reviewed-by: Matthew Dempsky <mdempsky@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: Michael Pratt <mpratt@google.com> Reviewed-by: Lynn Boger <laboger@linux.vnet.ibm.com> Run-TryBot: Paul Murphy <murp@ibm.com> TryBot-Result: Gopher Robot <gobot@golang.org>
2023-10-03cmd/internal/asm/ppc64: support 34b ADD/MOVD $const, RxPaul E. Murphy
For constant signed values which require 34b to represent, the assembler will generate a pli instruction on linux/power10/PPC64 instead of loading a constant. Similarly, ADD is extended to support 34b signed constants. On linux/power10/PPC64, this generates a paddi instruction. For assembler consistency, a second form is added if paddi cannot be used. The second form is provided for assembly writers. Change-Id: I98144306af766b02fbbe36b72856a23cdf51d247 Reviewed-on: https://go-review.googlesource.com/c/go/+/528317 TryBot-Result: Gopher Robot <gobot@golang.org> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: Eli Bendersky <eliben@google.com> Run-TryBot: Paul Murphy <murp@ibm.com> Reviewed-by: Michael Pratt <mpratt@google.com> Reviewed-by: Lynn Boger <laboger@linux.vnet.ibm.com>
2023-09-29cmd/internal/obj/ppc64: fix rebuilding of optab for asm testsPaul E. Murphy
The end-to-end asm tests reinitialize the assembler using different GOPPC64 values. This caused duplicate entries to amass from the prefix and generated optab entries. This bug only affects the asm end-to-end tests. On reinitialization, optab contains the previous prefixedOptab and optabGen entries, not just the initial values. Rework the initialization to avoid the stale optab entries. Change-Id: I310499915a5272ed0174ed8135d60788e6b4b716 Reviewed-on: https://go-review.googlesource.com/c/go/+/528316 Reviewed-by: Than McIntosh <thanm@google.com> Reviewed-by: Lynn Boger <laboger@linux.vnet.ibm.com> Reviewed-by: Bryan Mills <bcmills@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2023-09-15cmd/internal/obj/ppc64: improve RLWNM encodingPaul E. Murphy
If the rotate argument is the constant 0, rlwnm may be generated instead of rlwinm. In all reasonable cases, this is OK as R0 should hold 0. However, this could be problematic in some cases when writing PPC64 assembly. This consolidates the RLWNM and RLWMI optab entries. Invalid RLWMI usage is still rejected, however the error will be be slightly different. The invalid usage will be caught in oprrr instead of oplook. Change-Id: I9958bd24660fea5f8fc9e3e50d51daa7349e3206 Reviewed-on: https://go-review.googlesource.com/c/go/+/527275 Reviewed-by: Heschi Kreinick <heschi@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: Bryan Mills <bcmills@google.com> TryBot-Result: Gopher Robot <gobot@golang.org> Reviewed-by: Lynn Boger <laboger@linux.vnet.ibm.com> Run-TryBot: Paul Murphy <murp@ibm.com>
2023-09-07cmd/internal/obj/ppc64: do not assemble non-constant rotate RLWMIPaul E. Murphy
Unlike RLWNM, the ISA only supports an immediate rotate operand. Update optab and opirrr to avoid quietly assembling this insn. Change-Id: I1472a431cb8a870d55d5fff79ab905c4c459f630 Reviewed-on: https://go-review.googlesource.com/c/go/+/449835 Reviewed-by: Cherry Mui <cherryyz@google.com> TryBot-Result: Gopher Robot <gobot@golang.org> Reviewed-by: Lynn Boger <laboger@linux.vnet.ibm.com> Reviewed-by: Matthew Dempsky <mdempsky@google.com> Run-TryBot: Paul Murphy <murp@ibm.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
2023-05-19all: generate NOTOC shared code on power10/PPC64/linuxPaul E. Murphy
An explicit TOC pointer is not needed when building with GOPPC64=power10 on linux/PPC64 as all addressing is PC relative. Apply changes to the compiler, assembler, and linker to remove R2/TOC maintenance in these build configurations. This results in noticeably smaller PIC binaries. For example the size (in bytes) of the k8s binaries before and with this patch: GOFLAGS="-buildmode=pie" \ FORCE_HOST_GO=y \ GOPPC64=power10 \ CGO_CFLAGS="-mcpu=power10 -O2 -g" \ make all apiextensions-apiserver 66060288 64487424 -1572864 -2.38% e2e_node.test 163520856 159850760 -3670096 -2.24% e2e.test 178167304 174890432 -3276872 -1.83% ginkgo 11010048 10747904 -262144 -2.38% go-runner 2162688 2162688 0 0% k8s-tests 170182216 166970880 -3211336 -1.88% kubeadm 52625408 51314688 -1310720 -2.49% kube-aggregator 62849024 61341696 -1507328 -2.39% kube-apiserver 147783680 144375808 -3407872 -2.30% kube-controller-manager 131137536 127991808 -3145728 -2.39% kubectl 53608448 52363264 -1245184 -2.32% kubectl-convert 52625408 51314688 -1310720 -2.49% kubelet 120913920 118095872 -2818048 -2.33% kube-log-runner 1900544 1835008 -65536 -3.44% kubemark 119078912 116326400 -2752512 -2.31% kube-proxy 58392576 56885248 -1507328 -2.58% kube-scheduler 60751872 59244544 -1507328 -2.48% mounter 1835008 1769472 -65536 -3.57% watch-termination 38076416 37158912 -917504 -2.40% And text size changes: apiextensions-apiserver 30243288 28654116 -1589172 -5.25% e2e_node.test 71132064 67520288 -3611776 -5.07% e2e.test 61843984 58635088 -3208896 -5.18% ginkgo 4975916 4769304 -206612 -4.15% go-runner 896532 858400 -38132 -4.25% k8s-tests 60925792 57752032 -3173760 -5.20% kubeadm 24643240 23404100 -1239140 -5.02% kube-aggregator 28688060 27160976 -1527084 -5.32% kube-apiserver 65627332 62259460 -3367872 -5.13% kube-controller-manager 56773844 53706532 -3067312 -5.40% kubectl 24344276 23080640 -1263636 -5.19% kubectl-convert 23733764 22521768 -1211996 -5.10% kubelet 52494580 49720340 -2774240 -5.28% kube-log-runner 787128 753232 -33896 -4.30% kubemark 51576580 48837380 -2739200 -5.31% kube-proxy 26541092 25124080 -1417012 -5.33% kube-scheduler 27448512 25976172 -1472340 -5.36% mounter 744100 712628 -31472 -4.22% watch-termination 18047276 17139912 -907364 -5.02% Change-Id: Ib4872823b06f93861e46a00679b5d4e5e30b538a Reviewed-on: https://go-review.googlesource.com/c/go/+/495416 Reviewed-by: Lynn Boger <laboger@linux.vnet.ibm.com> Reviewed-by: Dmitri Shuralyov <dmitshur@google.com> Run-TryBot: Paul Murphy <murp@ibm.com> TryBot-Result: Gopher Robot <gobot@golang.org> Reviewed-by: Heschi Kreinick <heschi@google.com>
2023-04-21cmd/internal/obj/ppc64: modify PCALIGN to ensure alignmentLynn Boger
The initial purpose of PCALIGN was to identify code where it would be beneficial to align code for performance, but avoid cases where too many NOPs were added. On p10, it is now necessary to enforce a certain alignment in some cases, so the behavior of PCALIGN needs to be slightly different. Code will now be aligned to the value specified on the PCALIGN instruction regardless of number of NOPs added, which is more intuitive and consistent with power assembler alignment directives. This also adds 64 as a possible alignment value. The existing values used in PCALIGN were modified according to the new behavior. A testcase was updated and performance testing was done to verify that this does not adversely affect performance. Change-Id: Iad1cf5ff112e5bfc0514f0805be90e24095e932b Reviewed-on: https://go-review.googlesource.com/c/go/+/485056 TryBot-Result: Gopher Robot <gobot@golang.org> Run-TryBot: Lynn Boger <laboger@linux.vnet.ibm.com> Reviewed-by: Archana Ravindar <aravind5@in.ibm.com> Reviewed-by: Michael Pratt <mpratt@google.com> Reviewed-by: Paul Murphy <murp@ibm.com> Reviewed-by: Bryan Mills <bcmills@google.com>
2023-04-21cmd/link,cmd/internal/obj/ppc64: enable PCrel on power10/ppc64/linuxPaul E. Murphy
A CI machine has been set up to verify GOPPC64=power10 on ppc64/linux. This should be sufficient to verify the PCrel relocation support works for BE. Note, power10/ppc64/linux is an oddball case. Today, it can only link internally. Furthermore, all PCrel relocs are resolved at link time, so it works despite ELFv1 having no official support for PCrel relocs today. Change-Id: Ibf79df69406ec6f9352c9d7d941ad946dba74e73 Reviewed-on: https://go-review.googlesource.com/c/go/+/485075 TryBot-Result: Gopher Robot <gobot@golang.org> Reviewed-by: Lynn Boger <laboger@linux.vnet.ibm.com> Reviewed-by: Cherry Mui <cherryyz@google.com> Run-TryBot: Paul Murphy <murp@ibm.com> Reviewed-by: Bryan Mills <bcmills@google.com>
2023-04-04all: fix misuses of "a" vs "an"cui fliter
Fixes the misuse of "a" vs "an", according to English grammatical expectations and using https://www.a-or-an.com/ Change-Id: I53ac724070e3ff3d33c304483fe72c023c7cda47 Reviewed-on: https://go-review.googlesource.com/c/go/+/480536 Run-TryBot: shuang cui <imcusg@gmail.com> Reviewed-by: Ian Lance Taylor <iant@google.com> TryBot-Result: Gopher Robot <gobot@golang.org> Auto-Submit: Ian Lance Taylor <iant@google.com> Run-TryBot: Ian Lance Taylor <iant@google.com> Reviewed-by: Michael Knyszek <mknyszek@google.com>
2023-03-24cmd/internal/obj/ppc64: fix incorrect base reg causing segvLynn Boger
This fixes a segv that was reported due to building minio. The problem occurred because of an incorrect selection of the base register, which was introduced by CL 306369. Fixes #59196 Change-Id: Ieb77b2afa8fb4e6f3943df5ce138679f6750d376 Reviewed-on: https://go-review.googlesource.com/c/go/+/478920 Run-TryBot: Lynn Boger <laboger@linux.vnet.ibm.com> Reviewed-by: Dmitri Shuralyov <dmitshur@google.com> Reviewed-by: Archana Ravindar <aravind5@in.ibm.com> Reviewed-by: Heschi Kreinick <heschi@google.com> Auto-Submit: Lynn Boger <laboger@linux.vnet.ibm.com> Reviewed-by: Paul Murphy <murp@ibm.com> TryBot-Result: Gopher Robot <gobot@golang.org>
2023-03-22cmd/internal/obj/ppc64: add VC[LT]ZLSBB instructionsPaul E. Murphy
These are ISA 3.0 power9 instructions which are helpful when reducing a vector compare result into a GPR. They are used in a future patch to improve the bytes.IndexByte asm routine. Change-Id: I424e2628e577167b9b7c0fcbd82099daf568ea35 Reviewed-on: https://go-review.googlesource.com/c/go/+/478115 Reviewed-by: Lynn Boger <laboger@linux.vnet.ibm.com> TryBot-Result: Gopher Robot <gobot@golang.org> Reviewed-by: Heschi Kreinick <heschi@google.com> Run-TryBot: Paul Murphy <murp@ibm.com> Reviewed-by: Michael Knyszek <mknyszek@google.com>
2023-03-08cmd/internal/obj/ppc64: add SETB instructionPaul E. Murphy
This ISA 3.0 (power9) instruction is helpful for some string functions in a future change. Change-Id: I1a659488ffb5099f8c89f480c39af4ef9c4b556a Reviewed-on: https://go-review.googlesource.com/c/go/+/472635 Reviewed-by: Dmitri Shuralyov <dmitshur@google.com> Reviewed-by: Archana Ravindar <aravind5@in.ibm.com> Reviewed-by: Carlos Amedee <carlos@golang.org> Reviewed-by: Lynn Boger <laboger@linux.vnet.ibm.com> Run-TryBot: Paul Murphy <murp@ibm.com> TryBot-Result: Gopher Robot <gobot@golang.org>
2023-02-28cmd/internal/obj: use prefix insn in MOV* opcodes for GOPPC64=power10Paul E. Murphy
As background, Power10 adds prefixed load, store, and add immediate instructions which encode 34b signed displacements. Likewise, they also give the option to compute addresses against the PC. This enables using simpler PC relative (PC-rel) relocations instead of maintaining a dedicated pointer (the TOC) to the code/data blob on PPC64/linux. Similary, there are several Go opcodes where it can be advantageous to use prefixed instructions instead of composite sequences like oris/ori/add to implement "MOVD <big const>, Rx" or "ADD <big const>, Rx, Ry", or large offset load/stores like "MOVD <big constant>(Rx), Ry" using the same framework which dynamically configures optab. When selecting prefixed instruction forms, the assembler must also use new relocations. These new relocations are always PC-rel by design, thus code assembled as such has no implicit requirement to maintain a TOC pointer when assembling shared objects. Thus, we can safely avoid situations where some Go objects use a TOC pointer, and some do not. This greatly simplifies linking Go objects. For more details about the challenges of linking TOC and PC-rel compiled code, see the PPC64 ELFv2 ABI. The TOC pointer in R2 is still maintained in those build configurations which previously required it (e.x buildmode=pie). However, Go code built with PC-rel relocations does not require the TOC pointer. A future change could remove the overhead of maintaining a TOC pointer in those build configurations. This is enabled only for power10/ppc64le/linux. A final noteworthy difference between the prefixed and regular load/store instruction forms is the removal of the DS/DQ form restrictions. That is, the immediate operand does not need to be aligned. Updates #44549 Change-Id: If59c216d203c3eed963bfa08855e21771e6ed669 Reviewed-on: https://go-review.googlesource.com/c/go/+/355150 Reviewed-by: Michael Pratt <mpratt@google.com> Reviewed-by: Matthew Dempsky <mdempsky@google.com> TryBot-Result: Gopher Robot <gobot@golang.org> Reviewed-by: Lynn Boger <laboger@linux.vnet.ibm.com> Run-TryBot: Paul Murphy <murp@ibm.com>
2022-11-18all: add missing periods in commentscui fliter
Change-Id: I69065f8adf101fdb28682c55997f503013a50e29 Reviewed-on: https://go-review.googlesource.com/c/go/+/449757 Auto-Submit: Ian Lance Taylor <iant@google.com> Reviewed-by: Joedian Reid <joedian@golang.org> Reviewed-by: Keith Randall <khr@google.com> Reviewed-by: Keith Randall <khr@golang.org> TryBot-Result: Gopher Robot <gobot@golang.org> Run-TryBot: Joedian Reid <joedian@golang.org> Run-TryBot: Ian Lance Taylor <iant@google.com> Reviewed-by: Ian Lance Taylor <iant@google.com>
2022-09-28cmd/internal/obj/ppc64: remove unnecessary opcodesArchana R
This CL removes some opcode placeholders that do not correspond to any existing instructions and hence create confusion. Some instructions that are no longer valid like LDMX are also removed. Any references to this instruction in ISA 3.0 are considered as documentation errata. Change-Id: Ib71a657099723bbe1db88873233ee573b5c42fe7 Reviewed-on: https://go-review.googlesource.com/c/go/+/429860 TryBot-Result: Gopher Robot <gobot@golang.org> Reviewed-by: Paul Murphy <murp@ibm.com> Run-TryBot: Archana Ravindar <aravind5@in.ibm.com> Reviewed-by: Benny Siegert <bsiegert@gmail.com> Reviewed-by: Dmitri Shuralyov <dmitshur@google.com> Reviewed-by: Archana Ravindar <aravind5@in.ibm.com>
2022-09-15cmd/internal/obj/ppc64: add ISA 3.1 instructionsPaul E. Murphy
Use ppc64map (from x/arch) to generate ISA 3.1 support for the assembler. A new file asm9_gtables.go is added which contains generated code to encode ISA 3.1 instructions, a function to assist filling out the oprange structure, a lookup table for the fixed bits of each instructions, and a slice of string name. Generated functions are shared if their bitwise encoding match, and the translation from an obj.Prog structure matches. The generated file is entirely self-contained, and does not require regenerating any other files for changes within it. If opcodes in a.out.go are reordered or changed, anames.go must be updated in the same way as before. Future improvements could shrink the generated opcode table to 32 bit entries as there is much less variation of the encoding of the prefix word, but it is not always identical for instructions which share a similar encoding of arguments (e.g PLWA and PLWZ). Updates #44549 Change-Id: Ie83fa02497c9ad2280678d68391043d3aae63175 Reviewed-on: https://go-review.googlesource.com/c/go/+/419535 Run-TryBot: Paul Murphy <murp@ibm.com> TryBot-Result: Gopher Robot <gobot@golang.org> Run-TryBot: Jenny Rakoczy <jenny@golang.org> Reviewed-by: Lynn Boger <laboger@linux.vnet.ibm.com> Reviewed-by: Jenny Rakoczy <jenny@golang.org> Reviewed-by: Michael Pratt <mpratt@google.com> Auto-Submit: Jenny Rakoczy <jenny@golang.org>
2022-09-15cmd/asm, cmd/internal/obj/ppc64: increase asm test coverage for PPC64Archana R
This CL adds tests for some of the instructions that were missing. A minor change was made to asm9.go to ensure EXTSWSLICC test works. Change-Id: I95cd096c85778fc93856d213aa4fb14c35228cec Reviewed-on: https://go-review.googlesource.com/c/go/+/430376 Run-TryBot: Archana Ravindar <aravind5@in.ibm.com> Reviewed-by: Jenny Rakoczy <jenny@golang.org> Run-TryBot: Jenny Rakoczy <jenny@golang.org> TryBot-Result: Gopher Robot <gobot@golang.org> Reviewed-by: Lynn Boger <laboger@linux.vnet.ibm.com> Reviewed-by: Paul Murphy <murp@ibm.com> Reviewed-by: Michael Pratt <mpratt@google.com> Auto-Submit: Jenny Rakoczy <jenny@golang.org>
2022-09-07cmd/asm,cmd/internal/obj/ppc64: recognize ppc64 ISA 3.1 MMA registersPaul E. Murphy
Allow the assembler frontend to match MMA register arguments added by ISA 3.1. The prefix "A" (for accumulator) is chosen to identify them. Updates #44549 Change-Id: I363e7d1103aee19d7966829d2079c3d876621efc Reviewed-on: https://go-review.googlesource.com/c/go/+/419534 Reviewed-by: Cherry Mui <cherryyz@google.com> Run-TryBot: Paul Murphy <murp@ibm.com> Reviewed-by: Lynn Boger <laboger@linux.vnet.ibm.com> TryBot-Result: Gopher Robot <gobot@golang.org> Reviewed-by: Michael Knyszek <mknyszek@google.com>
2022-08-30cmd/asm: add new classification for index memory operands on PPC64Archana R
When a base+displacement kind of operand is given in an index-mode instruction, the assembler does not flag it as an invalid instruction causing the user to get an incorrect encoding of that instruction leading to incorrect execution of the program. Enable assembler to recognize valid and invalid operands used in index mode instructions by classifying SOREG type into two further types XOREG (used uniquely in index addressing mode instructions) and SOREG for instructions working on base+displacement operands. Also cleaned up usage of obj.Addr.Scale on PPC64. Change-Id: Ib4d84343ae57477c6c074f44c4c2749496e11b91 Reviewed-on: https://go-review.googlesource.com/c/go/+/405542 Reviewed-by: Lynn Boger <laboger@linux.vnet.ibm.com> TryBot-Result: Gopher Robot <gobot@golang.org> Reviewed-by: Heschi Kreinick <heschi@google.com> Reviewed-by: Cherry Mui <cherryyz@google.com> Run-TryBot: Archana Ravindar <aravind5@in.ibm.com>
2022-08-12cmd/internal/obj/ppc64: eliminate dead code from asm9.goAndy Pan
Change-Id: Ie59703ea7315a3f8efa1f543a8ca0afecff014d0 Reviewed-on: https://go-review.googlesource.com/c/go/+/421754 Run-TryBot: Paul Murphy <murp@ibm.com> TryBot-Result: Gopher Robot <gobot@golang.org> Reviewed-by: Paul Murphy <murp@ibm.com> Reviewed-by: Dmitri Shuralyov <dmitshur@google.com> Reviewed-by: Than McIntosh <thanm@google.com>
2022-05-10cmd/compile: lower Add64/Sub64 into ssa on PPC64Paul E. Murphy
math/bits.Add64 and math/bits.Sub64 now lower and optimize directly in SSA form. The optimization of carry chains focuses around eliding XER<->GPR transfers of the CA bit when used exclusively as an input to a single carry operations, or when the CA value is known. This also adds support for handling XER spills in the assembler which could happen if carry chains contain inter-dependencies on each other (which seems very unlikely with practical usage), or a clobber happens (SRAW/SRAD/SUBFC operations clobber CA). With PPC64 Add64/Sub64 lowering into SSA and this patch, the net performance difference in crypto/elliptic benchmarks on P9/ppc64le are: name old time/op new time/op delta ScalarBaseMult/P256 46.3µs ± 0% 46.9µs ± 0% +1.34% ScalarBaseMult/P224 356µs ± 0% 209µs ± 0% -41.14% ScalarBaseMult/P384 1.20ms ± 0% 0.57ms ± 0% -52.14% ScalarBaseMult/P521 3.38ms ± 0% 1.44ms ± 0% -57.27% ScalarMult/P256 199µs ± 0% 199µs ± 0% -0.17% ScalarMult/P224 357µs ± 0% 212µs ± 0% -40.56% ScalarMult/P384 1.20ms ± 0% 0.58ms ± 0% -51.86% ScalarMult/P521 3.37ms ± 0% 1.44ms ± 0% -57.32% MarshalUnmarshal/P256/Uncompressed 2.59µs ± 0% 2.52µs ± 0% -2.63% MarshalUnmarshal/P256/Compressed 2.58µs ± 0% 2.52µs ± 0% -2.06% MarshalUnmarshal/P224/Uncompressed 1.54µs ± 0% 1.40µs ± 0% -9.42% MarshalUnmarshal/P224/Compressed 1.54µs ± 0% 1.39µs ± 0% -9.87% MarshalUnmarshal/P384/Uncompressed 2.40µs ± 0% 1.80µs ± 0% -24.93% MarshalUnmarshal/P384/Compressed 2.35µs ± 0% 1.81µs ± 0% -23.03% MarshalUnmarshal/P521/Uncompressed 3.79µs ± 0% 2.58µs ± 0% -31.81% MarshalUnmarshal/P521/Compressed 3.80µs ± 0% 2.60µs ± 0% -31.67% Note, P256 uses an asm implementation, thus, little variation is expected. Change-Id: I88a24f6bf0f4f285c649e40243b1ab69cc452b71 Reviewed-on: https://go-review.googlesource.com/c/go/+/346870 Reviewed-by: Lynn Boger <laboger@linux.vnet.ibm.com> Reviewed-by: Dmitri Shuralyov <dmitshur@google.com> Run-TryBot: Paul Murphy <murp@ibm.com> TryBot-Result: Gopher Robot <gobot@golang.org> Reviewed-by: Ian Lance Taylor <iant@google.com>
2022-05-06cmd/compile,cmd/asm: fix ppc64 usage of BI argument of BC opcodePaul E. Murphy
Avoid coercing the CR bit into a GPR register type argument, and move the existing usage to CRx_y register types. And, update the compiler usage to this. This transformation is done internally, so it should not alter existing assembly code. Likewise, add assembly tests for all optab entries of BC/BR. This found some cases which were not possible to realize with handwritten asm, or assemble to something very unexpected if generated by the compiler. The following optab entries are removed, and the cases simplified or removed: {as: ABR, a3: C_SCON, a6: C_LR, type_: 18, size: 4} This existed only to pass the BH hint to JMP (LR) from compiler generated code. It cannot be matched with asm. Instead, add and support 4-operand form "BC{,L} $BO, $BI, $BH, (LR)". {as: ABR, a1: C_REG, a6: C_CTR, type_: 18, size: 4} Could be used like "BR R1, (CTR)", but always compiles to bctr irrespective of arg 1. Any usage should be rewritten as "JMP (CTR)", or rewritten if this was not the intended behavior. {as: ABR, a6: C_ZOREG, type_: 15, size: 8}: {as: ABC, a6: C_ZOREG, type_: 15, size: 8}, Not reachable: 0(reg) is coerced to reg in assembler frontend. {as: ABC, a2: C_REG, a6: C_LR, type_: 18, size: 4} {as: ABC, a2: C_REG, a6: C_CTR, type_: 18, size: 4} Only usable from the compiler. However, the compiler does not generate this form today. Without a BO operand (usually in a1), it is not clear what this should assemble to. Change-Id: I1b5151f884a5877e4a610e6fd41261e8e64c5454 Reviewed-on: https://go-review.googlesource.com/c/go/+/357775 Reviewed-by: Lynn Boger <laboger@linux.vnet.ibm.com> Run-TryBot: Paul Murphy <murp@ibm.com> Reviewed-by: Than McIntosh <thanm@google.com> TryBot-Result: Gopher Robot <gobot@golang.org> Reviewed-by: David Chase <drchase@google.com>
2022-05-04cmd/asm: on PPC64, allow ISEL to accept a CR bit argPaul E. Murphy
Using the CR bit register arguments makes it more easy to understand which condition and CR field is being tested when using ISEL. Likewise, cleanup optab setup for ISEL. ISEL should only accept a 5 bit unsigned constant (C_U5CON), and C_ZCON arguments are accepted by a C_U5CON optab arg. Change-Id: I2495dbe3595dd3f16c510b3492a88133af9f7e1a Reviewed-on: https://go-review.googlesource.com/c/go/+/402375 Reviewed-by: Lynn Boger <laboger@linux.vnet.ibm.com> Run-TryBot: Paul Murphy <murp@ibm.com> Reviewed-by: Cherry Mui <cherryyz@google.com> TryBot-Result: Gopher Robot <gobot@golang.org> Reviewed-by: Dmitri Shuralyov <dmitshur@google.com>
2022-04-19cmd/compile,cmd/internal/obj: replace Ctxt.FixedFrameSize method with Arch fieldAustin Clements
And delete now-unused FixedFrameSize methods. Change-Id: Id257e1647dbeb4eb4ab866c53744010c4efeb953 Reviewed-on: https://go-review.googlesource.com/c/go/+/400819 Run-TryBot: Austin Clements <austin@google.com> Reviewed-by: Cherry Mui <cherryyz@google.com> TryBot-Result: Gopher Robot <gobot@golang.org>
2022-03-11cmd/asm: add support for bdnz/bdz extended mnemonics on PPC64Paul E. Murphy
Support BDNZ and BDZ mnemonics, they are commonly used POWER instructions. The raw BC mnemonic is not easy to read. Likewise, cleanup code surrounding these changes. Change-Id: I72f1dad5013f7856bd0dd320bfb17b5a9f3c69ee Reviewed-on: https://go-review.googlesource.com/c/go/+/390696 Reviewed-by: Lynn Boger <laboger@linux.vnet.ibm.com> Trust: Paul Murphy <murp@ibm.com> Run-TryBot: Paul Murphy <murp@ibm.com> TryBot-Result: Gopher Robot <gobot@golang.org>
2022-03-03cmd/asm,cmd/compile: generate preferred nop on PPC64Paul E. Murphy
The preferred form of nop is ori 0,0,0. What was being generated was or 0,0,0. Fix a quirk in the assembler which effectively treats OR $0,Rx,Ry as OR R0,Rx,Ry, and update the compiler to generate the preferred form. Change-Id: I5ac4bf0258cff05b9eba516a767daebfc9e31bc7 Reviewed-on: https://go-review.googlesource.com/c/go/+/388974 Reviewed-by: Cherry Mui <cherryyz@google.com> Trust: Paul Murphy <murp@ibm.com> Run-TryBot: Paul Murphy <murp@ibm.com> TryBot-Result: Gopher Robot <gobot@golang.org>
2021-10-26cmd/internal/obj/ppc64: fix usage of CR bit argumentsPaul E. Murphy
CR bits and CR fields should be treated separately. Some instructions modify an entire CR, a CR field, or a single CR bit. Add a new argument class for CR bits, and teach the assembler the recognize them as names like CR0LT or CR2SO, and update the CR bit logic instructions to use them. They will no longer accept register field (CRn) type arguments. Fixes #46422 Change-Id: Iaba127d88abada0c2a49b8d3b07a976180565ae4 Reviewed-on: https://go-review.googlesource.com/c/go/+/357774 Run-TryBot: Paul Murphy <murp@ibm.com> Trust: Lynn Boger <laboger@linux.vnet.ibm.com> TryBot-Result: Go Bot <gobot@golang.org> Reviewed-by: Cherry Mui <cherryyz@google.com>
2021-10-21cmd/internal/obj/ppc64: rework argument classificationsPaul E. Murphy
This introduces a number of new classifications which will make it easier to generate functions to assemble the new instructions of ISA 3.1, and potentially earlier versions. No code generation changes should occur as a result of these. These allow finer control over how an opcode is matched to an optab entry. Literal values are now classified based on the smallest number of bits needed to encode, and matching rules will accept a literal if it can be zero/sign extended to fit a larger literal class. Likewise, support classifying even register numbers for GPR, VSX, and FPR instructions. Some instructions require and even/odd register pair, and these are usually represented by specifying the even register, and similarly encoded. Likewise, add a unit test for the argument classifier function (aclass). This caught an off-by-one bug in aclass which is also fixed. Updates #44549 Change-Id: Ia03013aea8b56c4d59b7c3812cdd67ddb3b720b9 Reviewed-on: https://go-review.googlesource.com/c/go/+/350152 Reviewed-by: Cherry Mui <cherryyz@google.com> Reviewed-by: Lynn Boger <laboger@linux.vnet.ibm.com> Run-TryBot: Cherry Mui <cherryyz@google.com> TryBot-Result: Go Bot <gobot@golang.org>
2021-10-12cmd/internal/obj/ppc64: support alignment of prefixed insnPaul E. Murphy
Insert machine NOPs when a prefixed instruction crosses a 64B boundary. ISA 3.1 prohibits prefixed instructions being placed across them. Such instructions generate SIGILL if executed. Likewise, adjust the function alignment to guarantee such instructions can never cross one. And, don't pad the PC based on alignment. The linker can fit these more optimally. Likewise, include the function alignment when printing function debug information. This is needed to verify function alignment happens. Updates #44549 Change-Id: I434fb0ee4e984ca00dc4566f7569c3bcdf93f910 Reviewed-on: https://go-review.googlesource.com/c/go/+/347050 Run-TryBot: Paul Murphy <murp@ibm.com> TryBot-Result: Go Bot <gobot@golang.org> Reviewed-by: Cherry Mui <cherryyz@google.com> Reviewed-by: Lynn Boger <laboger@linux.vnet.ibm.com>
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