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Diffstat (limited to 'test/codegen')
-rw-r--r--test/codegen/rotate.go24
1 files changed, 12 insertions, 12 deletions
diff --git a/test/codegen/rotate.go b/test/codegen/rotate.go
index 109e55763c..121ce4cc0a 100644
--- a/test/codegen/rotate.go
+++ b/test/codegen/rotate.go
@@ -18,7 +18,7 @@ func rot64(x uint64) uint64 {
// amd64:"ROLQ\t[$]7"
// ppc64x:"ROTL\t[$]7"
// loong64: "ROTRV\t[$]57"
- // riscv64: "OR","SLLI","SRLI",-"AND"
+ // riscv64: "RORI\t[$]57"
a += x<<7 | x>>57
// amd64:"ROLQ\t[$]8"
@@ -26,7 +26,7 @@ func rot64(x uint64) uint64 {
// s390x:"RISBGZ\t[$]0, [$]63, [$]8, "
// ppc64x:"ROTL\t[$]8"
// loong64: "ROTRV\t[$]56"
- // riscv64: "OR","SLLI","SRLI",-"AND"
+ // riscv64: "RORI\t[$]56"
a += x<<8 + x>>56
// amd64:"ROLQ\t[$]9"
@@ -34,7 +34,7 @@ func rot64(x uint64) uint64 {
// s390x:"RISBGZ\t[$]0, [$]63, [$]9, "
// ppc64x:"ROTL\t[$]9"
// loong64: "ROTRV\t[$]55"
- // riscv64: "OR","SLLI","SRLI",-"AND"
+ // riscv64: "RORI\t[$]55"
a += x<<9 ^ x>>55
// amd64:"ROLQ\t[$]10"
@@ -44,7 +44,7 @@ func rot64(x uint64) uint64 {
// arm64:"ROR\t[$]54"
// s390x:"RISBGZ\t[$]0, [$]63, [$]10, "
// loong64: "ROTRV\t[$]54"
- // riscv64: "OR","SLLI","SRLI",-"AND"
+ // riscv64: "RORI\t[$]54"
a += bits.RotateLeft64(x, 10)
return a
@@ -57,7 +57,7 @@ func rot32(x uint32) uint32 {
// arm:"MOVW\tR\\d+@>25"
// ppc64x:"ROTLW\t[$]7"
// loong64: "ROTR\t[$]25"
- // riscv64: "OR","SLLIW","SRLIW",-"AND"
+ // riscv64: "RORIW\t[$]25"
a += x<<7 | x>>25
// amd64:`ROLL\t[$]8`
@@ -66,7 +66,7 @@ func rot32(x uint32) uint32 {
// s390x:"RLL\t[$]8"
// ppc64x:"ROTLW\t[$]8"
// loong64: "ROTR\t[$]24"
- // riscv64: "OR","SLLIW","SRLIW",-"AND"
+ // riscv64: "RORIW\t[$]24"
a += x<<8 + x>>24
// amd64:"ROLL\t[$]9"
@@ -75,7 +75,7 @@ func rot32(x uint32) uint32 {
// s390x:"RLL\t[$]9"
// ppc64x:"ROTLW\t[$]9"
// loong64: "ROTR\t[$]23"
- // riscv64: "OR","SLLIW","SRLIW",-"AND"
+ // riscv64: "RORIW\t[$]23"
a += x<<9 ^ x>>23
// amd64:"ROLL\t[$]10"
@@ -86,7 +86,7 @@ func rot32(x uint32) uint32 {
// arm64:"RORW\t[$]22"
// s390x:"RLL\t[$]10"
// loong64: "ROTR\t[$]22"
- // riscv64: "OR","SLLIW","SRLIW",-"AND"
+ // riscv64: "RORIW\t[$]22"
a += bits.RotateLeft32(x, 10)
return a
@@ -141,14 +141,14 @@ func rot64nc(x uint64, z uint) uint64 {
// arm64:"ROR","NEG",-"AND"
// ppc64x:"ROTL",-"NEG",-"AND"
// loong64: "ROTRV", -"AND"
- // riscv64: "OR","SLL","SRL",-"AND"
+ // riscv64: "ROL",-"AND"
a += x<<z | x>>(64-z)
// amd64:"RORQ",-"AND"
// arm64:"ROR",-"NEG",-"AND"
// ppc64x:"ROTL","NEG",-"AND"
// loong64: "ROTRV", -"AND"
- // riscv64: "OR","SLL","SRL",-"AND"
+ // riscv64: "ROR",-"AND"
a += x>>z | x<<(64-z)
return a
@@ -163,14 +163,14 @@ func rot32nc(x uint32, z uint) uint32 {
// arm64:"ROR","NEG",-"AND"
// ppc64x:"ROTLW",-"NEG",-"AND"
// loong64: "ROTR", -"AND"
- // riscv64: "OR","SLLW","SRLW",-"AND"
+ // riscv64: "ROLW",-"AND"
a += x<<z | x>>(32-z)
// amd64:"RORL",-"AND"
// arm64:"ROR",-"NEG",-"AND"
// ppc64x:"ROTLW","NEG",-"AND"
// loong64: "ROTR", -"AND"
- // riscv64: "OR","SLLW","SRLW",-"AND"
+ // riscv64: "RORW",-"AND"
a += x>>z | x<<(32-z)
return a