diff options
Diffstat (limited to 'test/codegen/stack.go')
| -rw-r--r-- | test/codegen/stack.go | 77 |
1 files changed, 68 insertions, 9 deletions
diff --git a/test/codegen/stack.go b/test/codegen/stack.go index da5ef24e13..4469b57449 100644 --- a/test/codegen/stack.go +++ b/test/codegen/stack.go @@ -11,22 +11,81 @@ import "runtime" // This file contains code generation tests related to the use of the // stack. -// check that stack stores are optimized away +// Check that stack stores are optimized away. -// 386:"TEXT\t.*, [$]0-4" -// amd64:"TEXT\t.*, [$]0-8" -// arm:"TEXT\t.*, [$]-4-4" -// arm64:"TEXT\t.*, [$]-8-8" -// s390x:"TEXT\t.*, [$]0-8" -// ppc64le:"TEXT\t.*, [$]0-8" -// mips:"TEXT\t.*, [$]-4-4" +// 386:"TEXT\t.*, [$]0-" +// amd64:"TEXT\t.*, [$]0-" +// arm:"TEXT\t.*, [$]-4-" +// arm64:"TEXT\t.*, [$]-8-" +// mips:"TEXT\t.*, [$]-4-" +// ppc64le:"TEXT\t.*, [$]0-" +// s390x:"TEXT\t.*, [$]0-" func StackStore() int { var x int return *(&x) } +type T struct { + A, B, C, D int // keep exported fields + x, y, z int // reset unexported fields +} + +// Check that large structs are cleared directly (issue #24416). + +// 386:"TEXT\t.*, [$]0-" +// amd64:"TEXT\t.*, [$]0-" +// arm:"TEXT\t.*, [$]0-" (spills return address) +// arm64:"TEXT\t.*, [$]-8-" +// mips:"TEXT\t.*, [$]-4-" +// ppc64le:"TEXT\t.*, [$]0-" +// s390x:"TEXT\t.*, [$]0-" +func ZeroLargeStruct(x *T) { + t := T{} + *x = t +} + +// Check that structs are partially initialised directly (issue #24386). + +// Notes: +// - 386 fails due to spilling a register +// amd64:"TEXT\t.*, [$]0-" +// arm:"TEXT\t.*, [$]0-" (spills return address) +// arm64:"TEXT\t.*, [$]-8-" +// ppc64le:"TEXT\t.*, [$]0-" +// s390x:"TEXT\t.*, [$]0-" +// Note: that 386 currently has to spill a register. +func KeepWanted(t *T) { + *t = T{A: t.A, B: t.B, C: t.C, D: t.D} +} + +// Check that small array operations avoid using the stack (issue #15925). + +// Notes: +// - 386 fails due to spilling a register +// - arm & mips fail due to softfloat calls +// amd64:"TEXT\t.*, [$]0-" +// arm64:"TEXT\t.*, [$]-8-" +// ppc64le:"TEXT\t.*, [$]0-" +// s390x:"TEXT\t.*, [$]0-" +func ArrayAdd64(a, b [4]float64) [4]float64 { + return [4]float64{a[0] + b[0], a[1] + b[1], a[2] + b[2], a[3] + b[3]} +} + +// Check that small array initialization avoids using the stack. + +// 386:"TEXT\t.*, [$]0-" +// amd64:"TEXT\t.*, [$]0-" +// arm:"TEXT\t.*, [$]0-" (spills return address) +// arm64:"TEXT\t.*, [$]-8-" +// mips:"TEXT\t.*, [$]-4-" +// ppc64le:"TEXT\t.*, [$]0-" +// s390x:"TEXT\t.*, [$]0-" +func ArrayInit(i, j int) [4]int { + return [4]int{i, 0, j, 0} +} + // Check that assembly output has matching offset and base register -// (Issue #21064). +// (issue #21064). // amd64:`.*b\+24\(SP\)` // arm:`.*b\+4\(FP\)` |
