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-rw-r--r--src/cmd/asm/internal/arch/arm64.go18
-rw-r--r--src/cmd/asm/internal/asm/asm.go21
-rw-r--r--src/cmd/asm/internal/asm/testdata/arm64.s6
3 files changed, 24 insertions, 21 deletions
diff --git a/src/cmd/asm/internal/arch/arm64.go b/src/cmd/asm/internal/arch/arm64.go
index 3817fcd5c2..e643889aef 100644
--- a/src/cmd/asm/internal/arch/arm64.go
+++ b/src/cmd/asm/internal/arch/arm64.go
@@ -82,6 +82,17 @@ func IsARM64STLXR(op obj.As) bool {
return false
}
+// IsARM64TBL reports whether the op (as defined by an arm64.A*
+// constant) is one of the TBL-like instructions and one of its
+// inputs does not fit into prog.Reg, so require special handling.
+func IsARM64TBL(op obj.As) bool {
+ switch op {
+ case arm64.AVTBL, arm64.AVMOVQ:
+ return true
+ }
+ return false
+}
+
// ARM64Suffix handles the special suffix for the ARM64.
// It returns a boolean to indicate success; failure means
// cond was unrecognized.
@@ -125,13 +136,6 @@ func arm64RegisterNumber(name string, n int16) (int16, bool) {
return 0, false
}
-// IsARM64TBL reports whether the op (as defined by an arm64.A*
-// constant) is one of the table lookup instructions that require special
-// handling.
-func IsARM64TBL(op obj.As) bool {
- return op == arm64.AVTBL
-}
-
// ARM64RegisterExtension parses an ARM64 register with extension or arrangement.
func ARM64RegisterExtension(a *obj.Addr, ext string, reg, num int16, isAmount, isIndex bool) error {
Rnum := (reg & 31) + int16(num<<5)
diff --git a/src/cmd/asm/internal/asm/asm.go b/src/cmd/asm/internal/asm/asm.go
index 42e217dc23..7878d74549 100644
--- a/src/cmd/asm/internal/asm/asm.go
+++ b/src/cmd/asm/internal/asm/asm.go
@@ -622,8 +622,9 @@ func (p *Parser) asmInstruction(op obj.As, cond string, a []obj.Addr) {
prog.SetFrom3(a[1])
prog.To = a[2]
case sys.ARM64:
- // ARM64 instructions with one input and two outputs.
- if arch.IsARM64STLXR(op) {
+ switch {
+ case arch.IsARM64STLXR(op):
+ // ARM64 instructions with one input and two outputs.
prog.From = a[0]
prog.To = a[1]
if a[2].Type != obj.TYPE_REG {
@@ -631,20 +632,16 @@ func (p *Parser) asmInstruction(op obj.As, cond string, a []obj.Addr) {
return
}
prog.RegTo2 = a[2].Reg
- break
- }
- if arch.IsARM64TBL(op) {
+ case arch.IsARM64TBL(op):
+ // one of its inputs does not fit into prog.Reg.
prog.From = a[0]
- if a[1].Type != obj.TYPE_REGLIST {
- p.errorf("%s: expected list; found %s", op, obj.Dconv(prog, &a[1]))
- }
prog.SetFrom3(a[1])
prog.To = a[2]
- break
+ default:
+ prog.From = a[0]
+ prog.Reg = p.getRegister(prog, op, &a[1])
+ prog.To = a[2]
}
- prog.From = a[0]
- prog.Reg = p.getRegister(prog, op, &a[1])
- prog.To = a[2]
case sys.I386:
prog.From = a[0]
prog.SetFrom3(a[1])
diff --git a/src/cmd/asm/internal/asm/testdata/arm64.s b/src/cmd/asm/internal/asm/testdata/arm64.s
index acfb16b096..e277c04b7c 100644
--- a/src/cmd/asm/internal/asm/testdata/arm64.s
+++ b/src/cmd/asm/internal/asm/testdata/arm64.s
@@ -218,8 +218,10 @@ TEXT foo(SB), DUPOK|NOSPLIT, $-8
FMOVD $(28.0), F4 // 0490671e
// move a large constant to a Vd.
- FMOVD $0x8040201008040201, V20 // FMOVD $-9205322385119247871, V20
- FMOVQ $0x8040201008040202, V29 // FMOVQ $-9205322385119247870, V29
+ VMOVS $0x80402010, V11 // VMOVS $2151686160, V11
+ VMOVD $0x8040201008040201, V20 // VMOVD $-9205322385119247871, V20
+ VMOVQ $0x7040201008040201, $0x8040201008040201, V10 // VMOVQ $8088500183983456769, $-9205322385119247871, V10
+ VMOVQ $0x8040201008040202, $0x7040201008040201, V20 // VMOVQ $-9205322385119247870, $8088500183983456769, V20
FMOVS (R2)(R6), F4 // FMOVS (R2)(R6*1), F4 // 446866bc
FMOVS (R2)(R6<<2), F4 // 447866bc