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-rw-r--r--src/cmd/asm/internal/asm/testdata/riscv64.s13
1 files changed, 6 insertions, 7 deletions
diff --git a/src/cmd/asm/internal/asm/testdata/riscv64.s b/src/cmd/asm/internal/asm/testdata/riscv64.s
index 64b94a2a04..fe911a74f5 100644
--- a/src/cmd/asm/internal/asm/testdata/riscv64.s
+++ b/src/cmd/asm/internal/asm/testdata/riscv64.s
@@ -357,13 +357,12 @@ start:
JMP (X5) // 67800200
JMP 4(X5) // 67804200
- // JMP and CALL to symbol are encoded as:
- // AUIPC $0, TMP
- // JALR $0, TMP
- // with a R_RISCV_PCREL_ITYPE relocation - the linker resolves the
- // real address and updates the immediates for both instructions.
- CALL asmtest(SB) // 970f0000
- JMP asmtest(SB) // 970f0000
+ // CALL and JMP to symbol are encoded as JAL (using LR or ZERO
+ // respectively), with a R_RISCV_CALL relocation. The linker resolves
+ // the real address and updates the immediate, using a trampoline in
+ // the case where the address is not directly reachable.
+ CALL asmtest(SB) // ef000000
+ JMP asmtest(SB) // 6f000000
// Branch pseudo-instructions
BEQZ X5, 2(PC) // 63840200