diff options
Diffstat (limited to 'src/cmd/asm')
| -rw-r--r-- | src/cmd/asm/internal/arch/arm64.go | 16 | ||||
| -rw-r--r-- | src/cmd/asm/internal/asm/parse.go | 2 |
2 files changed, 9 insertions, 9 deletions
diff --git a/src/cmd/asm/internal/arch/arm64.go b/src/cmd/asm/internal/arch/arm64.go index 10458b01a0..0fc6c6a3ed 100644 --- a/src/cmd/asm/internal/arch/arm64.go +++ b/src/cmd/asm/internal/arch/arm64.go @@ -133,49 +133,49 @@ func ARM64RegisterExtension(a *obj.Addr, ext string, reg, num int16, isAmount, i if !isAmount { return errors.New("invalid register extension") } - a.Reg = arm64.REG_UXTB + (reg & 31) + int16(num<<5) + a.Reg = arm64.REG_UXTB + (reg & 31) + num<<5 a.Offset = int64(((rm & 31) << 16) | (uint32(num) << 10)) case "UXTH": if !isAmount { return errors.New("invalid register extension") } - a.Reg = arm64.REG_UXTH + (reg & 31) + int16(num<<5) + a.Reg = arm64.REG_UXTH + (reg & 31) + num<<5 a.Offset = int64(((rm & 31) << 16) | (1 << 13) | (uint32(num) << 10)) case "UXTW": if !isAmount { return errors.New("invalid register extension") } - a.Reg = arm64.REG_UXTW + (reg & 31) + int16(num<<5) + a.Reg = arm64.REG_UXTW + (reg & 31) + num<<5 a.Offset = int64(((rm & 31) << 16) | (2 << 13) | (uint32(num) << 10)) case "UXTX": if !isAmount { return errors.New("invalid register extension") } - a.Reg = arm64.REG_UXTX + (reg & 31) + int16(num<<5) + a.Reg = arm64.REG_UXTX + (reg & 31) + num<<5 a.Offset = int64(((rm & 31) << 16) | (3 << 13) | (uint32(num) << 10)) case "SXTB": if !isAmount { return errors.New("invalid register extension") } - a.Reg = arm64.REG_SXTB + (reg & 31) + int16(num<<5) + a.Reg = arm64.REG_SXTB + (reg & 31) + num<<5 a.Offset = int64(((rm & 31) << 16) | (4 << 13) | (uint32(num) << 10)) case "SXTH": if !isAmount { return errors.New("invalid register extension") } - a.Reg = arm64.REG_SXTH + (reg & 31) + int16(num<<5) + a.Reg = arm64.REG_SXTH + (reg & 31) + num<<5 a.Offset = int64(((rm & 31) << 16) | (5 << 13) | (uint32(num) << 10)) case "SXTW": if !isAmount { return errors.New("invalid register extension") } - a.Reg = arm64.REG_SXTW + (reg & 31) + int16(num<<5) + a.Reg = arm64.REG_SXTW + (reg & 31) + num<<5 a.Offset = int64(((rm & 31) << 16) | (6 << 13) | (uint32(num) << 10)) case "SXTX": if !isAmount { return errors.New("invalid register extension") } - a.Reg = arm64.REG_SXTX + (reg & 31) + int16(num<<5) + a.Reg = arm64.REG_SXTX + (reg & 31) + num<<5 a.Offset = int64(((rm & 31) << 16) | (7 << 13) | (uint32(num) << 10)) case "B8": if isIndex { diff --git a/src/cmd/asm/internal/asm/parse.go b/src/cmd/asm/internal/asm/parse.go index 5a6a7b2db9..0c18613f52 100644 --- a/src/cmd/asm/internal/asm/parse.go +++ b/src/cmd/asm/internal/asm/parse.go @@ -585,7 +585,7 @@ func (p *Parser) registerShift(name string, prefix rune) int64 { p.errorf("unexpected %s in register shift", tok.String()) } if p.arch.Family == sys.ARM64 { - return int64(int64(r1&31)<<16 | int64(op)<<22 | int64(uint16(count))) + return int64(r1&31)<<16 | int64(op)<<22 | int64(uint16(count)) } else { return int64((r1 & 15) | op<<5 | count) } |
