aboutsummaryrefslogtreecommitdiff
path: root/test/codegen
diff options
context:
space:
mode:
authorCherry Zhang <cherryyz@google.com>2020-08-21 14:18:06 -0400
committerCherry Zhang <cherryyz@google.com>2020-08-21 14:18:06 -0400
commit0ef562592fe05b50b0ae8fce495ee7e2eec791f0 (patch)
treed1c0f668e473ebdcb4a30e190008043bdb223bd9 /test/codegen
parentac5c406ef0ab20e2a11f57470271266ef4265221 (diff)
parent9679b307334bce77cc6e50751956a4c717e9458c (diff)
downloadgo-0ef562592fe05b50b0ae8fce495ee7e2eec791f0.tar.xz
[dev.link] all: merge branch 'master' into dev.link
Change-Id: Ic66b5138f3ecd9e9a48d7ab05782297c06e4a5b5
Diffstat (limited to 'test/codegen')
-rw-r--r--test/codegen/arithmetic.go18
-rw-r--r--test/codegen/bits.go13
-rw-r--r--test/codegen/comparisons.go49
-rw-r--r--test/codegen/logic.go24
4 files changed, 98 insertions, 6 deletions
diff --git a/test/codegen/arithmetic.go b/test/codegen/arithmetic.go
index 8f25974376..45fdb68903 100644
--- a/test/codegen/arithmetic.go
+++ b/test/codegen/arithmetic.go
@@ -71,9 +71,15 @@ func Mul_96(n int) int {
// 386:`SHLL\t[$]5`,`LEAL\t\(.*\)\(.*\*2\),`,-`IMULL`
// arm64:`LSL\t[$]5`,`ADD\sR[0-9]+<<1,\sR[0-9]+`,-`MUL`
// arm:`SLL\t[$]5`,`ADD\sR[0-9]+<<1,\sR[0-9]+`,-`MUL`
+ // s390x:`SLD\t[$]5`,`SLD\t[$]6`,-`MULLD`
return n * 96
}
+func Mul_n120(n int) int {
+ // s390x:`SLD\t[$]3`,`SLD\t[$]7`,-`MULLD`
+ return n * -120
+}
+
func MulMemSrc(a []uint32, b []float32) {
// 386:`IMULL\s4\([A-Z]+\),\s[A-Z]+`
a[0] *= a[1]
@@ -247,16 +253,20 @@ func Divisible(n1 uint, n2 int) (bool, bool, bool, bool) {
// 386:"IMUL3L\t[$]-1431655765","ADDL\t[$]715827882","ROLL\t[$]31",-"DIVQ"
// arm64:"MUL","ADD\t[$]3074457345618258602","ROR",-"DIV"
// arm:"MUL","ADD\t[$]715827882",-".*udiv"
- // ppc64:"MULLD","ADD","ROTL\t[$]63"
- // ppc64le:"MULLD","ADD","ROTL\t[$]63"
+ // ppc64/power8:"MULLD","ADD","ROTL\t[$]63"
+ // ppc64le/power8:"MULLD","ADD","ROTL\t[$]63"
+ // ppc64/power9:"MADDLD","ROTL\t[$]63"
+ // ppc64le/power9:"MADDLD","ROTL\t[$]63"
evenS := n2%6 == 0
// amd64:"IMULQ","ADD",-"ROLQ",-"DIVQ"
// 386:"IMUL3L\t[$]678152731","ADDL\t[$]113025455",-"ROLL",-"DIVQ"
// arm64:"MUL","ADD\t[$]485440633518672410",-"ROR",-"DIV"
// arm:"MUL","ADD\t[$]113025455",-".*udiv"
- // ppc64:"MULLD","ADD",-"ROTL"
- // ppc64le:"MULLD","ADD",-"ROTL"
+ // ppc64/power8:"MULLD","ADD",-"ROTL"
+ // ppc64/power9:"MADDLD",-"ROTL"
+ // ppc64le/power8:"MULLD","ADD",-"ROTL"
+ // ppc64le/power9:"MADDLD",-"ROTL"
oddS := n2%19 == 0
return evenU, oddU, evenS, oddS
diff --git a/test/codegen/bits.go b/test/codegen/bits.go
index 0a5428b55a..398dd84e9e 100644
--- a/test/codegen/bits.go
+++ b/test/codegen/bits.go
@@ -310,9 +310,18 @@ func op_bic(x, y uint32) uint32 {
return x &^ y
}
-func op_eon(x, y uint32) uint32 {
+func op_eon(x, y, z uint32, a []uint32, n, m uint64) uint64 {
+ // arm64:`EON\t`,-`EOR`,-`MVN`
+ a[0] = x ^ (y ^ 0xffffffff)
+
+ // arm64:`EON\t`,-`EOR`,-`MVN`
+ a[1] = ^(y ^ z)
+
// arm64:`EON\t`,-`XOR`
- return x ^ ^y
+ a[2] = x ^ ^z
+
+ // arm64:`EON\t`,-`EOR`,-`MVN`
+ return n ^ (m ^ 0xffffffffffffffff)
}
func op_orn(x, y uint32) uint32 {
diff --git a/test/codegen/comparisons.go b/test/codegen/comparisons.go
index 90808573c2..3c2dcb7eba 100644
--- a/test/codegen/comparisons.go
+++ b/test/codegen/comparisons.go
@@ -407,3 +407,52 @@ func CmpToZero_ex5(e, f int32, u uint32) int {
}
return 0
}
+func UintLtZero(a uint8, b uint16, c uint32, d uint64) int {
+ // amd64: -`(TESTB|TESTW|TESTL|TESTQ|JCC|JCS)`
+ // arm64: -`(CMPW|CMP|BHS|BLO)`
+ if a < 0 || b < 0 || c < 0 || d < 0 {
+ return 1
+ }
+ return 0
+}
+
+func UintGeqZero(a uint8, b uint16, c uint32, d uint64) int {
+ // amd64: -`(TESTB|TESTW|TESTL|TESTQ|JCS|JCC)`
+ // arm64: -`(CMPW|CMP|BLO|BHS)`
+ if a >= 0 || b >= 0 || c >= 0 || d >= 0 {
+ return 1
+ }
+ return 0
+}
+
+func UintGtZero(a uint8, b uint16, c uint32, d uint64) int {
+ // arm64: `CBZW`, `CBNZW`, `CBNZ`, -`(CMPW|CMP|BLS|BHI)`
+ if a > 0 || b > 0 || c > 0 || d > 0 {
+ return 1
+ }
+ return 0
+}
+
+func UintLeqZero(a uint8, b uint16, c uint32, d uint64) int {
+ // arm64: `CBNZW`, `CBZW`, `CBZ`, -`(CMPW|CMP|BHI|BLS)`
+ if a <= 0 || b <= 0 || c <= 0 || d <= 0 {
+ return 1
+ }
+ return 0
+}
+
+func UintLtOne(a uint8, b uint16, c uint32, d uint64) int {
+ // arm64: `CBNZW`, `CBZW`, `CBZW`, `CBZ`, -`(CMPW|CMP|BHS|BLO)`
+ if a < 1 || b < 1 || c < 1 || d < 1 {
+ return 1
+ }
+ return 0
+}
+
+func UintGeqOne(a uint8, b uint16, c uint32, d uint64) int {
+ // arm64: `CBZW`, `CBNZW`, `CBNZ`, -`(CMPW|CMP|BLO|BHS)`
+ if a >= 1 || b >= 1 || c >= 1 || d >= 1 {
+ return 1
+ }
+ return 0
+}
diff --git a/test/codegen/logic.go b/test/codegen/logic.go
new file mode 100644
index 0000000000..9afdfd760f
--- /dev/null
+++ b/test/codegen/logic.go
@@ -0,0 +1,24 @@
+// asmcheck
+
+// Copyright 2018 The Go Authors. All rights reserved.
+// Use of this source code is governed by a BSD-style
+// license that can be found in the LICENSE file.
+
+package codegen
+
+var gx, gy int
+
+// Test to make sure that (CMPQ (ANDQ x y) [0]) does not get rewritten to
+// (TESTQ x y) if the ANDQ has other uses. If that rewrite happens, then one
+// of the args of the ANDQ needs to be saved so it can be used as the arg to TESTQ.
+func andWithUse(x, y int) int {
+ // Load x,y into registers, so those MOVQ will not appear at the z := x&y line.
+ gx, gy = x, y
+ // amd64:-"MOVQ"
+ z := x & y
+ if z == 0 {
+ return 77
+ }
+ // use z by returning it
+ return z
+}