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| author | Egon Elbre <egonelbre@gmail.com> | 2020-11-27 17:10:33 +0200 |
|---|---|---|
| committer | Cherry Zhang <cherryyz@google.com> | 2021-02-24 19:49:08 +0000 |
| commit | 3ee32439b5114c1fe5f04891b678613aa72e13c2 (patch) | |
| tree | 4b720a21892117f69ca39f8aca1f370a20d07e1c /test/codegen/memops.go | |
| parent | 80ddc17ae1b3ffacc42c19b999956f9ccef3ddd1 (diff) | |
| download | go-3ee32439b5114c1fe5f04891b678613aa72e13c2.tar.xz | |
cmd/compile: ARM64 optimize []float64 and []float32 access
Optimize load and store to []float64 and []float32.
Previously it used LSL instead of shifted register indexed load/store.
Before:
LSL $3, R0, R0
FMOVD F0, (R1)(R0)
After:
FMOVD F0, (R1)(R0<<3)
Fixes #42798
Change-Id: I0c0912140c3dce5aa6abc27097c0eb93833cc589
Reviewed-on: https://go-review.googlesource.com/c/go/+/273706
Reviewed-by: Cherry Zhang <cherryyz@google.com>
Run-TryBot: Cherry Zhang <cherryyz@google.com>
TryBot-Result: Go Bot <gobot@golang.org>
Trust: Giovanni Bajo <rasky@develer.com>
Diffstat (limited to 'test/codegen/memops.go')
| -rw-r--r-- | test/codegen/memops.go | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/test/codegen/memops.go b/test/codegen/memops.go index a234283146..7f06a574fe 100644 --- a/test/codegen/memops.go +++ b/test/codegen/memops.go @@ -177,9 +177,11 @@ func idxFloat32(x, y []float32, i int) { var t float32 // amd64: `MOVSS\t4\([A-Z]+[0-9]*\)\([A-Z]+[0-9]*\*4\), X[0-9]+` // 386/sse2: `MOVSS\t4\([A-Z]+[0-9]*\)\([A-Z]+[0-9]*\*4\), X[0-9]+` + // arm64: `FMOVS\t\(R[0-9]*\)\(R[0-9]*<<2\), F[0-9]+` t = x[i+1] // amd64: `MOVSS\tX[0-9]+, 4\([A-Z]+[0-9]*\)\([A-Z]+[0-9]*\*4\)` // 386/sse2: `MOVSS\tX[0-9]+, 4\([A-Z]+[0-9]*\)\([A-Z]+[0-9]*\*4\)` + // arm64: `FMOVS\tF[0-9]+, \(R[0-9]*\)\(R[0-9]*<<2\)` y[i+1] = t // amd64: `MOVSS\t4\([A-Z]+[0-9]*\)\([A-Z]+[0-9]*\*[14]\), X[0-9]+` // 386/sse2: `MOVSS\t4\([A-Z]+[0-9]*\)\([A-Z]+[0-9]*\*[14]\), X[0-9]+` @@ -193,9 +195,11 @@ func idxFloat64(x, y []float64, i int) { var t float64 // amd64: `MOVSD\t8\([A-Z]+[0-9]*\)\([A-Z]+[0-9]*\*8\), X[0-9]+` // 386/sse2: `MOVSD\t8\([A-Z]+[0-9]*\)\([A-Z]+[0-9]*\*8\), X[0-9]+` + // arm64: `FMOVD\t\(R[0-9]*\)\(R[0-9]*<<3\), F[0-9]+` t = x[i+1] // amd64: `MOVSD\tX[0-9]+, 8\([A-Z]+[0-9]*\)\([A-Z]+[0-9]*\*8\)` // 386/sse2: `MOVSD\tX[0-9]+, 8\([A-Z]+[0-9]*\)\([A-Z]+[0-9]*\*8\)` + // arm64: `FMOVD\tF[0-9]+, \(R[0-9]*\)\(R[0-9]*<<3\)` y[i+1] = t // amd64: `MOVSD\t8\([A-Z]+[0-9]*\)\([A-Z]+[0-9]*\*[18]\), X[0-9]+` // 386/sse2: `MOVSD\t8\([A-Z]+[0-9]*\)\([A-Z]+[0-9]*\*[18]\), X[0-9]+` |