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| author | Junyang Shao <shaojunyang@google.com> | 2025-09-19 18:38:25 +0000 |
|---|---|---|
| committer | Cherry Mui <cherryyz@google.com> | 2025-10-03 12:31:13 -0700 |
| commit | 003b5ce1bc15cf265e74ba1ec4eb7cf801e49986 (patch) | |
| tree | 8b8805133ba70b636045fb544623035b186a9f38 /src | |
| parent | d91148c7a8b2d774ddea5c66c170d24937195df5 (diff) | |
| download | go-003b5ce1bc15cf265e74ba1ec4eb7cf801e49986.tar.xz | |
cmd/compile: fix SIMD const rematerialization condition
This CL fixes a condition for the previous fix CL 704056.
Cherry-picked from the dev.simd branch. This CL is not
necessarily SIMD specific. Apply early to reduce risk. Test is
SIMD specific so not included for now.
Change-Id: I1f1f8c6f72870403cb3dff14755c43385dc0c933
Reviewed-on: https://go-review.googlesource.com/c/go/+/705499
LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
Reviewed-by: Cherry Mui <cherryyz@google.com>
Reviewed-on: https://go-review.googlesource.com/c/go/+/708864
Reviewed-by: David Chase <drchase@google.com>
Diffstat (limited to 'src')
| -rw-r--r-- | src/cmd/compile/internal/ssa/regalloc.go | 17 |
1 files changed, 10 insertions, 7 deletions
diff --git a/src/cmd/compile/internal/ssa/regalloc.go b/src/cmd/compile/internal/ssa/regalloc.go index 88861dfa14..e959b8ed7d 100644 --- a/src/cmd/compile/internal/ssa/regalloc.go +++ b/src/cmd/compile/internal/ssa/regalloc.go @@ -2561,22 +2561,25 @@ func (e *edgeState) processDest(loc Location, vid ID, splice **Value, pos src.XP e.s.f.Fatalf("can't find source for %s->%s: %s\n", e.p, e.b, v.LongString()) } if dstReg { - // Handle incompatible registers. + // We want to rematerialize v into a register that is incompatible with v's op's register mask. + // Instead of setting the wrong register for the rematerialized v, we should find the right register + // for it and emit an additional copy to move to the desired register. // For #70451. - if e.s.regspec(v).outputs[0].regs®Mask(1<<register(loc.(*Register).num)) == 0 && c != nil { + if e.s.regspec(v).outputs[0].regs®Mask(1<<register(loc.(*Register).num)) == 0 { _, srcReg := src.(*Register) - if !srcReg { + if srcReg { + // It exists in a valid register already, so just copy it to the desired register + // If src is a Register, c must have already been set. + x = e.p.NewValue1(pos, OpCopy, c.Type, c) + } else { // We need a tmp register x = v.copyInto(e.p) r := e.findRegFor(x.Type) e.erase(r) - // Rematerialize to a tmp register + // Rematerialize to the tmp register e.set(r, vid, x, false, pos) // Copy from tmp to the desired register x = e.p.NewValue1(pos, OpCopy, x.Type, x) - } else { - // It exist in a valid register already, so just copy it to the desired register - x = e.p.NewValue1(pos, OpCopy, c.Type, c) } } else { x = v.copyInto(e.p) |