[dev.simd] cmd/compile: fix unstable output

This CL fixed an error left by CL 718160.

Change-Id: I442ea59bc1ff0dda2914d1858dd5ebe93e2818dc
Reviewed-on: https://go-review.googlesource.com/c/go/+/720281
LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
Reviewed-by: David Chase <drchase@google.com>
Reviewed-by: Cherry Mui <cherryyz@google.com>

2 files changed, 43 insertions, 2 deletions

diff --git a/src/simd/_gen/simdgen/gen_simdrules.go b/src/simd/_gen/simdgen/gen_simdrules.go
index 8dd1707da9..19393add71 100644
--- a/src/simd/_gen/simdgen/gen_simdrules.go
+++ b/src/simd/_gen/simdgen/gen_simdrules.go
@@ -318,13 +318,25 @@ func writeSIMDRules(ops []Operation) *bytes.Buffer {
 			case 128, 256:
 				// VPBLENDVB cases.
 				noMaskName := machineOpName(NoMask, gOp)
-				maskedMergeOpts[noMaskName] = fmt.Sprintf("(VPBLENDVB%d dst (%s %s) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (%sMerging dst %s (VPMOVVec%dx%dToM <types.TypeMask> mask))\n",
+				ruleExisting, ok := maskedMergeOpts[noMaskName]
+				rule := fmt.Sprintf("(VPBLENDVB%d dst (%s %s) mask) && v.Block.CPUfeatures.hasFeature(CPUavx512) => (%sMerging dst %s (VPMOVVec%dx%dToM <types.TypeMask> mask))\n",
 					*maskElem.Bits, noMaskName, data.Args, data.Asm, data.Args, *maskElem.ElemBits, *maskElem.Lanes)
+				if ok && ruleExisting != rule {
+					panic("multiple masked merge rules for one op")
+				} else {
+					maskedMergeOpts[noMaskName] = rule
+				}
 			case 512:
 				// VPBLENDM[BWDQ] cases.
 				noMaskName := machineOpName(NoMask, gOp)
-				maskedMergeOpts[noMaskName] = fmt.Sprintf("(VPBLENDM%sMasked%d dst (%s %s) mask) => (%sMerging dst %s mask)\n",
+				ruleExisting, ok := maskedMergeOpts[noMaskName]
+				rule := fmt.Sprintf("(VPBLENDM%sMasked%d dst (%s %s) mask) => (%sMerging dst %s mask)\n",
 					s2n[*maskElem.ElemBits], *maskElem.Bits, noMaskName, data.Args, data.Asm, data.Args)
+				if ok && ruleExisting != rule {
+					panic("multiple masked merge rules for one op")
+				} else {
+					maskedMergeOpts[noMaskName] = rule
+				}
 			}
 		}
 
@@ -362,10 +374,15 @@ func writeSIMDRules(ops []Operation) *bytes.Buffer {
 		}
 	}
 
+	maskedMergeOptsRules := []string{}
 	for asm, rule := range maskedMergeOpts {
 		if !asmCheck[asm] {
 			continue
 		}
+		maskedMergeOptsRules = append(maskedMergeOptsRules, rule)
+	}
+	slices.Sort(maskedMergeOptsRules)
+	for _, rule := range maskedMergeOptsRules {
 		buffer.WriteString(rule)
 	}
 
diff --git a/src/simd/_gen/simdgen/godefs.go b/src/simd/_gen/simdgen/godefs.go
index f42251c5c3..7d3943b4b8 100644
--- a/src/simd/_gen/simdgen/godefs.go
+++ b/src/simd/_gen/simdgen/godefs.go
@@ -133,6 +133,25 @@ func (o *Operation) VectorWidth() int {
 	panic(fmt.Errorf("Figure out what the vector width is for %v and implement it", *o))
 }
 
+// Right now simdgen computes the machine op name for most instructions
+// as $Name$OutputSize, by this denotation, these instructions are "overloaded".
+// for example:
+// (Uint16x8) ConvertToInt8
+// (Uint16x16) ConvertToInt8
+// are both VPMOVWB128.
+// To make them distinguishable we need to append the input size to them as well.
+// TODO: document them well in the generated code.
+var demotingConvertOps = map[string]bool{
+	"VPMOVQD128": true, "VPMOVSQD128": true, "VPMOVUSQD128": true, "VPMOVQW128": true, "VPMOVSQW128": true,
+	"VPMOVUSQW128": true, "VPMOVDW128": true, "VPMOVSDW128": true, "VPMOVUSDW128": true, "VPMOVQB128": true,
+	"VPMOVSQB128": true, "VPMOVUSQB128": true, "VPMOVDB128": true, "VPMOVSDB128": true, "VPMOVUSDB128": true,
+	"VPMOVWB128": true, "VPMOVSWB128": true, "VPMOVUSWB128": true,
+	"VPMOVQDMasked128": true, "VPMOVSQDMasked128": true, "VPMOVUSQDMasked128": true, "VPMOVQWMasked128": true, "VPMOVSQWMasked128": true,
+	"VPMOVUSQWMasked128": true, "VPMOVDWMasked128": true, "VPMOVSDWMasked128": true, "VPMOVUSDWMasked128": true, "VPMOVQBMasked128": true,
+	"VPMOVSQBMasked128": true, "VPMOVUSQBMasked128": true, "VPMOVDBMasked128": true, "VPMOVSDBMasked128": true, "VPMOVUSDBMasked128": true,
+	"VPMOVWBMasked128": true, "VPMOVSWBMasked128": true, "VPMOVUSWBMasked128": true,
+}
+
 func machineOpName(maskType maskShape, gOp Operation) string {
 	asm := gOp.Asm
 	if maskType == OneMask {
@@ -142,6 +161,11 @@ func machineOpName(maskType maskShape, gOp Operation) string {
 	if gOp.SSAVariant != nil {
 		asm += *gOp.SSAVariant
 	}
+	if demotingConvertOps[asm] {
+		// Need to append the size of the source as well.
+		// TODO: should be "%sto%d".
+		asm = fmt.Sprintf("%s_%d", asm, *gOp.In[0].Bits)
+	}
 	return asm
 }