diff options
| author | Russ Cox <rsc@golang.org> | 2008-08-04 16:43:49 -0700 |
|---|---|---|
| committer | Russ Cox <rsc@golang.org> | 2008-08-04 16:43:49 -0700 |
| commit | d28acc42ec0f8dff9471e4663cfe55aa5da86656 (patch) | |
| tree | 9bbd3f46848f10a65f701fb12cbddadf5e59b114 /src/runtime/rt0_amd64.s | |
| parent | f439299035bbdb4ac7c1c684214b7bf8b4347474 (diff) | |
| download | go-d28acc42ec0f8dff9471e4663cfe55aa5da86656.tar.xz | |
first cut at multithreading. works on Linux.
* kick off new os procs (machs) as needed
* add sys·sleep for testing
* add Lock, Rendez
* properly lock mal, sys·newproc, scheduler
* linux syscall arg #4 is in R10, not CX
* chans are not multithread-safe yet
* multithreading disabled by default;
set $gomaxprocs=2 (or 1000) to turn it on
This should build on OS X but may not.
Rob and I will fix soon after submitting.
TBR=r
OCL=13784
CL=13842
Diffstat (limited to 'src/runtime/rt0_amd64.s')
| -rw-r--r-- | src/runtime/rt0_amd64.s | 27 |
1 files changed, 23 insertions, 4 deletions
diff --git a/src/runtime/rt0_amd64.s b/src/runtime/rt0_amd64.s index 20761464fb..9d7aedc7db 100644 --- a/src/runtime/rt0_amd64.s +++ b/src/runtime/rt0_amd64.s @@ -14,9 +14,9 @@ TEXT _rt0_amd64(SB),7,$-8 MOVQ AX, 16(SP) MOVQ BX, 24(SP) - // allocate the per-user and per-mach blocks + // set the per-goroutine and per-mach registers - LEAQ m0<>(SB), R14 // dedicated m. register + LEAQ m0(SB), R14 // dedicated m. register LEAQ g0(SB), R15 // dedicated g. register MOVQ R15, 0(R14) // m has pointer to its g0 @@ -33,8 +33,9 @@ TEXT _rt0_amd64(SB),7,$-8 MOVQ 24(SP), AX // copy argv MOVQ AX, 8(SP) CALL args(SB) + CALL schedinit(SB) CALL main·init_function(SB) // initialization - + // create a new goroutine to start program PUSHQ $main·main(SB) // entry @@ -102,4 +103,22 @@ TEXT setspgoto(SB), 7, $0 POPQ AX RET -GLOBL m0<>(SB),$64 +// bool cas(int32 *val, int32 old, int32 new) +// Atomically: +// if(*val == old){ +// *val = new; +// return 1; +// }else +// return 0; +TEXT cas(SB), 7, $0 + MOVQ 8(SP), BX + MOVL 16(SP), AX + MOVL 20(SP), CX + LOCK + CMPXCHGL CX, 0(BX) + JZ 3(PC) + MOVL $0, AX + RET + MOVL $1, AX + RET + |