diff options
| author | isharipo <iskander.sharipov@intel.com> | 2018-03-19 23:07:18 +0300 |
|---|---|---|
| committer | Ilya Tocar <ilya.tocar@intel.com> | 2018-03-21 20:51:04 +0000 |
| commit | ff5cf43df5b1614f940157b21ca6ed64791b8a1f (patch) | |
| tree | 7ce052bcf4b4c33efa32c7207f15cadd77a27168 /src/runtime/internal | |
| parent | 65727ab59d20663a76692fea7b8444dbb349080b (diff) | |
| download | go-ff5cf43df5b1614f940157b21ca6ed64791b8a1f.tar.xz | |
runtime,sync/atomic: replace asm BYTEs with insts for x86
For each replacement, test case is added to new 386enc.s file
with exception of EMMS, SYSENTER, MFENCE and LFENCE as they
are already covered in amd64enc.s (same on amd64 and 386).
The replacement became less obvious after go vet suggested changes
Before:
BYTE $0x0f; BYTE $0x7f; BYTE $0x44; BYTE $0x24; BYTE $0x08
Changed to MOVQ (this form is being tested):
MOVQ M0, 8(SP)
Refactored to FP-relative access (go vet advice):
MOVQ M0, val+4(FP)
Change-Id: I56b87cf3371b6ad81ad0cd9db2033aee407b5818
Reviewed-on: https://go-review.googlesource.com/101475
Run-TryBot: Iskander Sharipov <iskander.sharipov@intel.com>
TryBot-Result: Gobot Gobot <gobot@golang.org>
Reviewed-by: Ilya Tocar <ilya.tocar@intel.com>
Diffstat (limited to 'src/runtime/internal')
| -rw-r--r-- | src/runtime/internal/atomic/asm_386.s | 18 |
1 files changed, 6 insertions, 12 deletions
diff --git a/src/runtime/internal/atomic/asm_386.s b/src/runtime/internal/atomic/asm_386.s index 882906e9ed..c3ef79f913 100644 --- a/src/runtime/internal/atomic/asm_386.s +++ b/src/runtime/internal/atomic/asm_386.s @@ -124,12 +124,9 @@ TEXT runtime∕internal∕atomic·Load64(SB), NOSPLIT, $0-12 JZ 2(PC) MOVL 0, AX // crash with nil ptr deref LEAL ret_lo+4(FP), BX - // MOVQ (%EAX), %MM0 - BYTE $0x0f; BYTE $0x6f; BYTE $0x00 - // MOVQ %MM0, 0(%EBX) - BYTE $0x0f; BYTE $0x7f; BYTE $0x03 - // EMMS - BYTE $0x0F; BYTE $0x77 + MOVQ (AX), M0 + MOVQ M0, (BX) + EMMS RET // void runtime∕internal∕atomic·Store64(uint64 volatile* addr, uint64 v); @@ -139,12 +136,9 @@ TEXT runtime∕internal∕atomic·Store64(SB), NOSPLIT, $0-12 JZ 2(PC) MOVL 0, AX // crash with nil ptr deref // MOVQ and EMMS were introduced on the Pentium MMX. - // MOVQ 0x8(%ESP), %MM0 - BYTE $0x0f; BYTE $0x6f; BYTE $0x44; BYTE $0x24; BYTE $0x08 - // MOVQ %MM0, (%EAX) - BYTE $0x0f; BYTE $0x7f; BYTE $0x00 - // EMMS - BYTE $0x0F; BYTE $0x77 + MOVQ val+4(FP), M0 + MOVQ M0, (AX) + EMMS // This is essentially a no-op, but it provides required memory fencing. // It can be replaced with MFENCE, but MFENCE was introduced only on the Pentium4 (SSE2). MOVL $0, AX |