cmd/9a, cmd/9g, cmd/9l, liblink: update for portable Prog, Addr

Change-Id: I55afed0eabf3c38e72ff105294782ac36446b66b
Reviewed-on: https://go-review.googlesource.com/3519
Reviewed-by: Aram Hăvărneanu <aram@mgk.ro>

3 files changed, 273 insertions, 379 deletions

diff --git a/src/liblink/asm9.c b/src/liblink/asm9.c
index f604395a7a..3ae8c48442 100644
--- a/src/liblink/asm9.c
+++ b/src/liblink/asm9.c
@@ -543,14 +543,14 @@ span9(Link *ctxt, LSym *cursym)
 					q->link = p->link;
 					p->link = q;
 					q->as = ABR;
-					q->to.type = D_BRANCH;
+					q->to.type = TYPE_BRANCH;
 					q->pcond = p->pcond;
 					p->pcond = q;
 					q = ctxt->arch->prg();
 					q->link = p->link;
 					p->link = q;
 					q->as = ABR;
-					q->to.type = D_BRANCH;
+					q->to.type = TYPE_BRANCH;
 					q->pcond = q->link->link;
 					//addnop(p->link);
 					//addnop(p);
@@ -614,57 +614,56 @@ aclass(Link *ctxt, Addr *a)
 	LSym *s;
 
 	switch(a->type) {
-	case D_NONE:
+	case TYPE_NONE:
 		return C_NONE;
 
-	case D_REG:
-		return C_REG;
-
-	case D_FREG:
-		return C_FREG;
-
-	case D_CREG:
-		return C_CREG;
-
-	case D_SPR:
-		if(a->offset == D_LR)
-			return C_LR;
-		if(a->offset == D_XER)
-			return C_XER;
-		if(a->offset == D_CTR)
-			return C_CTR;
-		return C_SPR;
-
-	case D_DCR:
-		return C_SPR;
-
-	case D_FPSCR:
-		return C_FPSCR;
-
-	case D_MSR:
-		return C_MSR;
+	case TYPE_REG:
+		if(REG_R0 <= a->reg && a->reg <= REG_R31)
+			return C_REG;
+		if(REG_F0 <= a->reg && a->reg <= REG_F31)
+			return C_FREG;
+		if(REG_C0 <= a->reg && a->reg <= REG_C7 || a->reg == REG_CR)
+			return C_CREG;
+		if(REG_SPR0 <= a->reg && a->reg <= REG_SPR0+1023) {
+			switch(a->reg) {
+			case REG_LR:
+				return C_LR;
+			case REG_XER:
+				return C_XER;
+			case REG_CTR:
+				return C_CTR;
+			}
+			return C_SPR;
+		}
+		if(REG_DCR0 <= a->reg && a->reg <= REG_DCR0+1023)
+			return C_SPR;
+		if(a->reg == REG_FPSCR)
+			return C_FPSCR;
+		if(a->reg == REG_MSR)
+			return C_MSR;
+		return C_GOK;
 
-	case D_OREG:
+	case TYPE_MEM:
 		switch(a->name) {
-		case D_EXTERN:
-		case D_STATIC:
+		case NAME_EXTERN:
+		case NAME_STATIC:
 			if(a->sym == nil)
 				break;
 			ctxt->instoffset = a->offset;
 			if(a->sym != nil) // use relocation
 				return C_ADDR;
 			return C_LEXT;
-		case D_AUTO:
+		case NAME_AUTO:
 			ctxt->instoffset = ctxt->autosize + a->offset;
 			if(ctxt->instoffset >= -BIG && ctxt->instoffset < BIG)
 				return C_SAUTO;
 			return C_LAUTO;
-		case D_PARAM:
+		case NAME_PARAM:
 			ctxt->instoffset = ctxt->autosize + a->offset + 8L;
 			if(ctxt->instoffset >= -BIG && ctxt->instoffset < BIG)
 				return C_SAUTO;
 			return C_LAUTO;
-		case D_NONE:
+		case TYPE_NONE:
 			ctxt->instoffset = a->offset;
 			if(ctxt->instoffset == 0)
 				return C_ZOREG;
@@ -674,17 +673,11 @@ aclass(Link *ctxt, Addr *a)
 		}
 		return C_GOK;
 
-	case D_OPT:
-		ctxt->instoffset = a->offset & 31L;
-		if(a->name == D_NONE)
-			return C_SCON;
-		return C_GOK;
-
-	case D_CONST:
+	case TYPE_CONST:
 		switch(a->name) {
-		case D_NONE:
+		case TYPE_NONE:
 			ctxt->instoffset = a->offset;
-			if(a->reg != NREG) {
+			if(a->reg != 0) {
 				if(-BIG <= ctxt->instoffset && ctxt->instoffset <= BIG)
 					return C_SACON;
 				if(isint32(ctxt->instoffset))
@@ -693,8 +686,8 @@ aclass(Link *ctxt, Addr *a)
 			}
 			goto consize;
 
-		case D_EXTERN:
-		case D_STATIC:
+		case NAME_EXTERN:
+		case NAME_STATIC:
 			s = a->sym;
 			if(s == nil)
 				break;
@@ -706,13 +699,13 @@ aclass(Link *ctxt, Addr *a)
 			/* not sure why this barfs */
 			return C_LCON;
 
-		case D_AUTO:
+		case NAME_AUTO:
 			ctxt->instoffset = ctxt->autosize + a->offset;
 			if(ctxt->instoffset >= -BIG && ctxt->instoffset < BIG)
 				return C_SACON;
 			return C_LACON;
 
-		case D_PARAM:
+		case NAME_PARAM:
 			ctxt->instoffset = ctxt->autosize + a->offset + 8L;
 			if(ctxt->instoffset >= -BIG && ctxt->instoffset < BIG)
 				return C_SACON;
@@ -742,7 +735,7 @@ aclass(Link *ctxt, Addr *a)
 			return C_LCON;
 		return C_DCON;
 
-	case D_BRANCH:
+	case TYPE_BRANCH:
 		return C_SBRA;
 	}
 	return C_GOK;
@@ -783,7 +776,7 @@ oplook(Link *ctxt, Prog *p)
 	}
 	a4--;
 	a2 = C_NONE;
-	if(p->reg != NREG)
+	if(p->reg != 0)
 		a2 = C_REG;
 //print("oplook %P %d %d %d %d\n", p, a1, a2, a3, a4);
 	r = p->as;
@@ -1515,7 +1508,7 @@ asmout(Link *ctxt, Prog *p, Optab *o, uint32 *out)
 		break;
 
 	case 1:		/* mov r1,r2 ==> OR Rs,Rs,Ra */
-		if(p->to.reg == REGZERO && p->from.type == D_CONST) {
+		if(p->to.reg == REGZERO && p->from.type == TYPE_CONST) {
 			v = regoff(ctxt, &p->from);
 			if(r0iszero && v != 0) {
 				//nerrors--;
@@ -1529,7 +1522,7 @@ asmout(Link *ctxt, Prog *p, Optab *o, uint32 *out)
 
 	case 2:		/* int/cr/fp op Rb,[Ra],Rd */
 		r = p->reg;
-		if(r == NREG)
+		if(r == 0)
 			r = p->to.reg;
 		o1 = AOP_RRR(oprrr(ctxt, p->as), p->to.reg, r, p->from.reg);
 		break;
@@ -1538,7 +1531,7 @@ asmout(Link *ctxt, Prog *p, Optab *o, uint32 *out)
 		d = vregoff(ctxt, &p->from);
 		v = d;
 		r = p->from.reg;
-		if(r == NREG)
+		if(r == 0)
 			r = o->param;
 		if(r0iszero && p->to.reg == 0 && (r != 0 || v != 0))
 			ctxt->diag("literal operation on R0\n%P", p);
@@ -1562,7 +1555,7 @@ asmout(Link *ctxt, Prog *p, Optab *o, uint32 *out)
 	case 4:		/* add/mul $scon,[r1],r2 */
 		v = regoff(ctxt, &p->from);
 		r = p->reg;
-		if(r == NREG)
+		if(r == 0)
 			r = p->to.reg;
 		if(r0iszero && p->to.reg == 0)
 			ctxt->diag("literal operation on R0\n%P", p);
@@ -1577,17 +1570,17 @@ asmout(Link *ctxt, Prog *p, Optab *o, uint32 *out)
 
 	case 6:		/* logical op Rb,[Rs,]Ra; no literal */
 		r = p->reg;
-		if(r == NREG)
+		if(r == 0)
 			r = p->to.reg;
 		o1 = LOP_RRR(oprrr(ctxt, p->as), p->to.reg, r, p->from.reg);
 		break;
 
 	case 7:		/* mov r, soreg ==> stw o(r) */
 		r = p->to.reg;
-		if(r == NREG)
+		if(r == 0)
 			r = o->param;
 		v = regoff(ctxt, &p->to);
-		if(p->to.type == D_OREG && p->reg != NREG) {
+		if(p->to.type == TYPE_MEM && p->reg != 0) {
 			if(v)
 				ctxt->diag("illegal indexed instruction\n%P", p);
 			o1 = AOP_RRR(opstorex(ctxt, p->as), p->from.reg, p->reg, r);
@@ -1600,10 +1593,10 @@ asmout(Link *ctxt, Prog *p, Optab *o, uint32 *out)
 
 	case 8:		/* mov soreg, r ==> lbz/lhz/lwz o(r) */
 		r = p->from.reg;
-		if(r == NREG)
+		if(r == 0)
 			r = o->param;
 		v = regoff(ctxt, &p->from);
-		if(p->from.type == D_OREG && p->reg != NREG) {
+		if(p->from.type == TYPE_MEM && p->reg != 0) {
 			if(v)
 				ctxt->diag("illegal indexed instruction\n%P", p);
 			o1 = AOP_RRR(oploadx(ctxt, p->as), p->to.reg, p->reg, r);
@@ -1616,10 +1609,10 @@ asmout(Link *ctxt, Prog *p, Optab *o, uint32 *out)
 
 	case 9:		/* movb soreg, r ==> lbz o(r),r2; extsb r2,r2 */
 		r = p->from.reg;
-		if(r == NREG)
+		if(r == 0)
 			r = o->param;
 		v = regoff(ctxt, &p->from);
-		if(p->from.type == D_OREG && p->reg != NREG) {
+		if(p->from.type == TYPE_MEM && p->reg != 0) {
 			if(v)
 				ctxt->diag("illegal indexed instruction\n%P", p);
 			o1 = AOP_RRR(oploadx(ctxt, p->as), p->to.reg, p->reg, r);
@@ -1630,7 +1623,7 @@ asmout(Link *ctxt, Prog *p, Optab *o, uint32 *out)
 
 	case 10:		/* sub Ra,[Rb],Rd => subf Rd,Ra,Rb */
 		r = p->reg;
-		if(r == NREG)
+		if(r == 0)
 			r = p->to.reg;
 		o1 = AOP_RRR(oprrr(ctxt, p->as), p->to.reg, p->from.reg, r);
 		break;
@@ -1663,7 +1656,7 @@ asmout(Link *ctxt, Prog *p, Optab *o, uint32 *out)
 		break;
 
 	case 12:	/* movb r,r (extsb); movw r,r (extsw) */
-		if(p->to.reg == REGZERO && p->from.type == D_CONST) {
+		if(p->to.reg == REGZERO && p->from.type == TYPE_CONST) {
 			v = regoff(ctxt, &p->from);
 			if(r0iszero && v != 0) {
 				ctxt->diag("literal operation on R0\n%P", p);
@@ -1692,7 +1685,7 @@ asmout(Link *ctxt, Prog *p, Optab *o, uint32 *out)
 
 	case 14:	/* rldc[lr] Rb,Rs,$mask,Ra -- left, right give different masks */
 		r = p->reg;
-		if(r == NREG)
+		if(r == 0)
 			r = p->to.reg;
 		d = vregoff(ctxt, &p->from3);
 		maskgen64(ctxt, p, mask, d);
@@ -1720,10 +1713,10 @@ asmout(Link *ctxt, Prog *p, Optab *o, uint32 *out)
 	case 17:	/* bc bo,bi,lbra (same for now) */
 	case 16:	/* bc bo,bi,sbra */
 		a = 0;
-		if(p->from.type == D_CONST)
+		if(p->from.type == TYPE_CONST)
 			a = regoff(ctxt, &p->from);
 		r = p->reg;
-		if(r == NREG)
+		if(r == 0)
 			r = 0;
 		v = 0;
 		if(p->pcond)
@@ -1743,9 +1736,9 @@ asmout(Link *ctxt, Prog *p, Optab *o, uint32 *out)
 		else
 			v = 20;	/* unconditional */
 		r = p->reg;
-		if(r == NREG)
+		if(r == 0)
 			r = 0;
-		o1 = AOP_RRR(OP_MTSPR, p->to.reg, 0, 0) | ((D_LR&0x1f)<<16) | (((D_LR>>5)&0x1f)<<11);
+		o1 = AOP_RRR(OP_MTSPR, p->to.reg, 0, 0) | ((REG_LR&0x1f)<<16) | (((REG_LR>>5)&0x1f)<<11);
 		o2 = OPVCC(19, 16, 0, 0);
 		if(p->as == ABL || p->as == ABCL)
 			o2 |= 1;
@@ -1758,7 +1751,7 @@ asmout(Link *ctxt, Prog *p, Optab *o, uint32 *out)
 		else
 			v = 20;	/* unconditional */
 		r = p->reg;
-		if(r == NREG)
+		if(r == 0)
 			r = 0;
 		switch(oclass(&p->to)) {
 		case C_CTR:
@@ -1792,7 +1785,7 @@ asmout(Link *ctxt, Prog *p, Optab *o, uint32 *out)
 	case 20:	/* add $ucon,,r */
 		v = regoff(ctxt, &p->from);
 		r = p->reg;
-		if(r == NREG)
+		if(r == 0)
 			r = p->to.reg;
 		if(p->as == AADD && (!r0iszero && p->reg == 0 || r0iszero && p->to.reg == 0))
 			ctxt->diag("literal operation on R0\n%P", p);
@@ -1806,7 +1799,7 @@ asmout(Link *ctxt, Prog *p, Optab *o, uint32 *out)
 		o1 = loadu32(REGTMP, d);
 		o2 = LOP_IRR(OP_ORI, REGTMP, REGTMP, (int32)d);
 		r = p->reg;
-		if(r == NREG)
+		if(r == 0)
 			r = p->to.reg;
 		o3 = AOP_RRR(oprrr(ctxt, p->as), p->to.reg, REGTMP, r);
 		if(p->from.sym != nil)
@@ -1821,7 +1814,7 @@ asmout(Link *ctxt, Prog *p, Optab *o, uint32 *out)
 		o1 = loadu32(REGTMP, d);
 		o2 = LOP_IRR(OP_ORI, REGTMP, REGTMP, (int32)d);
 		r = p->reg;
-		if(r == NREG)
+		if(r == 0)
 			r = p->to.reg;
 		o3 = LOP_RRR(oprrr(ctxt, p->as), p->to.reg, REGTMP, r);
 		if(p->from.sym != nil)
@@ -1837,7 +1830,7 @@ asmout(Link *ctxt, Prog *p, Optab *o, uint32 *out)
 		else if(v > 63)
 			v = 63;
 		r = p->reg;
-		if(r == NREG)
+		if(r == 0)
 			r = p->to.reg;
 		switch(p->as){
 		case ASLD: case ASLDCC:
@@ -1869,7 +1862,7 @@ asmout(Link *ctxt, Prog *p, Optab *o, uint32 *out)
 			ctxt->diag("can't synthesize large constant\n%P", p);
 		v = regoff(ctxt, &p->from);
 		r = p->from.reg;
-		if(r == NREG)
+		if(r == 0)
 			r = o->param;
 		o1 = AOP_IRR(OP_ADDIS, REGTMP, r, high16adjusted(v));
 		o2 = AOP_IRR(OP_ADDI, p->to.reg, REGTMP, v);
@@ -1961,7 +1954,7 @@ asmout(Link *ctxt, Prog *p, Optab *o, uint32 *out)
 
 	case 32:	/* fmul frc,fra,frd */
 		r = p->reg;
-		if(r == NREG)
+		if(r == 0)
 			r = p->to.reg;
 		o1 = AOP_RRR(oprrr(ctxt, p->as), p->to.reg, r, 0)|((p->from.reg&31L)<<6);
 		break;
@@ -1980,7 +1973,7 @@ asmout(Link *ctxt, Prog *p, Optab *o, uint32 *out)
 	case 35:	/* mov r,lext/lauto/loreg ==> cau $(v>>16),sb,r'; store o(r') */
 		v = regoff(ctxt, &p->to);
 		r = p->to.reg;
-		if(r == NREG)
+		if(r == 0)
 			r = o->param;
 		o1 = AOP_IRR(OP_ADDIS, REGTMP, r, high16adjusted(v));
 		o2 = AOP_IRR(opstore(ctxt, p->as), p->from.reg, REGTMP, v);
@@ -1989,7 +1982,7 @@ asmout(Link *ctxt, Prog *p, Optab *o, uint32 *out)
 	case 36:	/* mov bz/h/hz lext/lauto/lreg,r ==> lbz/lha/lhz etc */
 		v = regoff(ctxt, &p->from);
 		r = p->from.reg;
-		if(r == NREG)
+		if(r == 0)
 			r = o->param;
 		o1 = AOP_IRR(OP_ADDIS, REGTMP, r, high16adjusted(v));
 		o2 = AOP_IRR(opload(ctxt, p->as), p->to.reg, REGTMP, v);
@@ -1998,7 +1991,7 @@ asmout(Link *ctxt, Prog *p, Optab *o, uint32 *out)
 	case 37:	/* movb lext/lauto/lreg,r ==> lbz o(reg),r; extsb r */
 		v = regoff(ctxt, &p->from);
 		r = p->from.reg;
-		if(r == NREG)
+		if(r == 0)
 			r = o->param;
 		o1 = AOP_IRR(OP_ADDIS, REGTMP, r, high16adjusted(v));
 		o2 = AOP_IRR(opload(ctxt, p->as), p->to.reg, REGTMP, v);
@@ -2019,20 +2012,20 @@ asmout(Link *ctxt, Prog *p, Optab *o, uint32 *out)
 
 	case 43:	/* unary indexed source: dcbf (b); dcbf (a+b) */
 		r = p->reg;
-		if(r == NREG)
+		if(r == 0)
 			r = 0;
 		o1 = AOP_RRR(oprrr(ctxt, p->as), 0, r, p->from.reg);
 		break;
 
 	case 44:	/* indexed store */
 		r = p->reg;
-		if(r == NREG)
+		if(r == 0)
 			r = 0;
 		o1 = AOP_RRR(opstorex(ctxt, p->as), p->from.reg, r, p->to.reg);
 		break;
 	case 45:	/* indexed load */
 		r = p->reg;
-		if(r == NREG)
+		if(r == 0)
 			r = 0;
 		o1 = AOP_RRR(oploadx(ctxt, p->as), p->to.reg, r, p->from.reg);
 		break;
@@ -2043,20 +2036,20 @@ asmout(Link *ctxt, Prog *p, Optab *o, uint32 *out)
 
 	case 47:	/* op Ra, Rd; also op [Ra,] Rd */
 		r = p->from.reg;
-		if(r == NREG)
+		if(r == 0)
 			r = p->to.reg;
 		o1 = AOP_RRR(oprrr(ctxt, p->as), p->to.reg, r, 0);
 		break;
 
 	case 48:	/* op Rs, Ra */
 		r = p->from.reg;
-		if(r == NREG)
+		if(r == 0)
 			r = p->to.reg;
 		o1 = LOP_RRR(oprrr(ctxt, p->as), p->to.reg, r, 0);
 		break;
 
 	case 49:	/* op Rb; op $n, Rb */
-		if(p->from.type != D_REG){	/* tlbie $L, rB */
+		if(p->from.type != TYPE_REG){	/* tlbie $L, rB */
 			v = regoff(ctxt, &p->from) & 1;
 			o1 = AOP_RRR(oprrr(ctxt, p->as), 0, 0, p->to.reg) | (v<<21);
 		}else
@@ -2065,7 +2058,7 @@ asmout(Link *ctxt, Prog *p, Optab *o, uint32 *out)
 
 	case 50:	/* rem[u] r1[,r2],r3 */
 		r = p->reg;
-		if(r == NREG)
+		if(r == 0)
 			r = p->to.reg;
 		v = oprrr(ctxt, p->as);
 		t = v & ((1<<10)|1);	/* OE|Rc */
@@ -2081,7 +2074,7 @@ asmout(Link *ctxt, Prog *p, Optab *o, uint32 *out)
 
 	case 51:	/* remd[u] r1[,r2],r3 */
 		r = p->reg;
-		if(r == NREG)
+		if(r == 0)
 			r = p->to.reg;
 		v = oprrr(ctxt, p->as);
 		t = v & ((1<<10)|1);	/* OE|Rc */
@@ -2116,7 +2109,7 @@ asmout(Link *ctxt, Prog *p, Optab *o, uint32 *out)
 	case 56:	/* sra $sh,[s,]a; srd $sh,[s,]a */
 		v = regoff(ctxt, &p->from);
 		r = p->reg;
-		if(r == NREG)
+		if(r == 0)
 			r = p->to.reg;
 		o1 = AOP_RRR(opirr(ctxt, p->as), r, p->to.reg, v&31L);
 		if(p->as == ASRAD && (v&0x20))
@@ -2126,7 +2119,7 @@ asmout(Link *ctxt, Prog *p, Optab *o, uint32 *out)
 	case 57:	/* slw $sh,[s,]a -> rlwinm ... */
 		v = regoff(ctxt, &p->from);
 		r = p->reg;
-		if(r == NREG)
+		if(r == 0)
 			r = p->to.reg;
 		/*
 		 * Let user (gs) shoot himself in the foot. 
@@ -2155,7 +2148,7 @@ asmout(Link *ctxt, Prog *p, Optab *o, uint32 *out)
 	case 58:		/* logical $andcon,[s],a */
 		v = regoff(ctxt, &p->from);
 		r = p->reg;
-		if(r == NREG)
+		if(r == 0)
 			r = p->to.reg;
 		o1 = LOP_IRR(opirr(ctxt, p->as), p->to.reg, r, v);
 		break;
@@ -2163,7 +2156,7 @@ asmout(Link *ctxt, Prog *p, Optab *o, uint32 *out)
 	case 59:	/* or/and $ucon,,r */
 		v = regoff(ctxt, &p->from);
 		r = p->reg;
-		if(r == NREG)
+		if(r == 0)
 			r = p->to.reg;
 		o1 = LOP_IRR(opirr(ctxt, p->as+AEND), p->to.reg, r, v>>16);	/* oris, xoris, andis */
 		break;
@@ -2193,7 +2186,7 @@ asmout(Link *ctxt, Prog *p, Optab *o, uint32 *out)
 		break;
 
 	case 64:	/* mtfsf fr[, $m] {,fpcsr} */
-		if(p->from3.type != D_NONE)
+		if(p->from3.type != TYPE_NONE)
 			v = regoff(ctxt, &p->from3)&255L;
 		else
 			v = 255;
@@ -2201,23 +2194,23 @@ asmout(Link *ctxt, Prog *p, Optab *o, uint32 *out)
 		break;
 
 	case 65:	/* MOVFL $imm,FPSCR(n) => mtfsfi crfd,imm */
-		if(p->to.reg == NREG)
+		if(p->to.reg == 0)
 			ctxt->diag("must specify FPSCR(n)\n%P", p);
 		o1 = OP_MTFSFI | ((p->to.reg&15L)<<23) | ((regoff(ctxt, &p->from)&31L)<<12);
 		break;
 
 	case 66:	/* mov spr,r1; mov r1,spr, also dcr */
-		if(p->from.type == D_REG) {
+		if(REG_R0 <= p->from.reg && p->from.reg <= REG_R31) {
 			r = p->from.reg;
-			v = p->to.offset;
-			if(p->to.type == D_DCR)
+			v = p->to.reg;
+			if(REG_DCR0 <= v && v <= REG_DCR0+1023)
 				o1 = OPVCC(31,451,0,0);	/* mtdcr */
 			else
 				o1 = OPVCC(31,467,0,0); /* mtspr */
 		} else {
 			r = p->to.reg;
-			v = p->from.offset;
-			if(p->from.type == D_DCR)
+			v = p->from.reg;
+			if(REG_DCR0 <= v && v <= REG_DCR0+1023)
 				o1 = OPVCC(31,323,0,0);	/* mfdcr */
 			else
 				o1 = OPVCC(31,339,0,0);	/* mfspr */
@@ -2226,14 +2219,14 @@ asmout(Link *ctxt, Prog *p, Optab *o, uint32 *out)
 		break;
 
 	case 67:	/* mcrf crfD,crfS */
-		if(p->from.type != D_CREG || p->from.reg == NREG ||
-		   p->to.type != D_CREG || p->to.reg == NREG)
+		if(p->from.type != TYPE_REG || p->from.reg < REG_C0 || REG_C7 < p->from.reg ||
+		   p->to.type != TYPE_REG || p->to.reg < REG_C0 || REG_C7 < p->to.reg)
 			ctxt->diag("illegal CR field number\n%P", p);
 		o1 = AOP_RRR(OP_MCRF, ((p->to.reg&7L)<<2), ((p->from.reg&7)<<2), 0);
 		break;
 
 	case 68:	/* mfcr rD; mfocrf CRM,rD */
-		if(p->from.type == D_CREG && p->from.reg != NREG){
+		if(p->from.type == TYPE_REG && REG_C0 <= p->from.reg && p->from.reg <= REG_C7) {
 			v = 1<<(7-(p->to.reg&7));	/* CR(n) */
 			o1 = AOP_RRR(OP_MFCR, p->to.reg, 0, 0) | (1<<20) | (v<<12);	/* new form, mfocrf */
 		}else
@@ -2241,12 +2234,12 @@ asmout(Link *ctxt, Prog *p, Optab *o, uint32 *out)
 		break;
 
 	case 69:	/* mtcrf CRM,rS */
-		if(p->from3.type != D_NONE) {
-			if(p->to.reg != NREG)
+		if(p->from3.type != TYPE_NONE) {
+			if(p->to.reg != 0)
 				ctxt->diag("can't use both mask and CR(n)\n%P", p);
 			v = regoff(ctxt, &p->from3) & 0xff;
 		} else {
-			if(p->to.reg == NREG)
+			if(p->to.reg == 0)
 				v = 0xff;	/* CR */
 			else
 				v = 1<<(7-(p->to.reg&7));	/* CR(n) */
@@ -2255,7 +2248,7 @@ asmout(Link *ctxt, Prog *p, Optab *o, uint32 *out)
 		break;
 
 	case 70:	/* [f]cmp r,r,cr*/
-		if(p->reg == NREG)
+		if(p->reg == 0)
 			r = 0;
 		else
 			r = (p->reg&7)<<2;
@@ -2263,7 +2256,7 @@ asmout(Link *ctxt, Prog *p, Optab *o, uint32 *out)
 		break;
 
 	case 71:	/* cmp[l] r,i,cr*/
-		if(p->reg == NREG)
+		if(p->reg == 0)
 			r = 0;
 		else
 			r = (p->reg&7)<<2;
@@ -2275,18 +2268,18 @@ asmout(Link *ctxt, Prog *p, Optab *o, uint32 *out)
 		break;
 
 	case 73:	/* mcrfs crfD,crfS */
-		if(p->from.type != D_FPSCR || p->from.reg == NREG ||
-		   p->to.type != D_CREG || p->to.reg == NREG)
+		if(p->from.type != TYPE_REG || p->from.reg != REG_FPSCR ||
+		   p->to.type != TYPE_REG || p->to.reg < REG_C0 || REG_C7 < p->to.reg)
 			ctxt->diag("illegal FPSCR/CR field number\n%P", p);
-		o1 = AOP_RRR(OP_MCRFS, ((p->to.reg&7L)<<2), ((p->from.reg&7)<<2), 0);
+		o1 = AOP_RRR(OP_MCRFS, ((p->to.reg&7L)<<2), ((0&7)<<2), 0);
 		break;
 
 	case 77:	/* syscall $scon, syscall Rx */
-		if(p->from.type == D_CONST) {
+		if(p->from.type == TYPE_CONST) {
 			if(p->from.offset > BIG || p->from.offset < -BIG)
 				ctxt->diag("illegal syscall, sysnum too large: %P", p);
 			o1 = AOP_IRR(OP_ADDI, REGZERO, REGZERO, p->from.offset);
-		} else if(p->from.type == D_REG) {
+		} else if(p->from.type == TYPE_REG) {
 			o1 = LOP_RRR(OP_OR, REGZERO, p->from.reg, p->from.reg);
 		} else {
 			ctxt->diag("illegal syscall: %P", p);
diff --git a/src/liblink/list9.c b/src/liblink/list9.c
index ce0fb4b295..f688b50751 100644
--- a/src/liblink/list9.c
+++ b/src/liblink/list9.c
@@ -86,7 +86,7 @@ Pconv(Fmt *fp)
 {
 	char str[STRINGSZ];
 	Prog *p;
-	int a, ch;
+	int a;
 
 	p = va_arg(fp->args, Prog*);
 	bigP = p;
@@ -108,25 +108,21 @@ Pconv(Fmt *fp)
 	} else {
 		if(p->mark & NOSCHED)
 			sprint(strchr(str, 0), "*");
-		if(p->reg == NREG && p->from3.type == D_NONE)
+		if(p->reg == 0 && p->from3.type == TYPE_NONE)
 			sprint(strchr(str, 0), "%.5lld (%L)	%A	%D,%D", p->pc, p->lineno, a, &p->from, &p->to);
 		else
-		if(a != ATEXT && p->from.type == D_OREG) {
-			sprint(strchr(str, 0), "%.5lld (%L)	%A	%lld(R%d+R%d),%D", p->pc, p->lineno, a,
+		if(a != ATEXT && p->from.type == TYPE_MEM) {
+			sprint(strchr(str, 0), "%.5lld (%L)	%A	%lld(%R+%R),%D", p->pc, p->lineno, a,
 				p->from.offset, p->from.reg, p->reg, &p->to);
 		} else
-		if(p->to.type == D_OREG) {
-			sprint(strchr(str, 0), "%.5lld (%L)	%A	%D,%lld(R%d+R%d)", p->pc, p->lineno, a,
+		if(p->to.type == TYPE_MEM) {
+			sprint(strchr(str, 0), "%.5lld (%L)	%A	%D,%lld(%R+%R)", p->pc, p->lineno, a,
 					&p->from, p->to.offset, p->to.reg, p->reg);
 		} else {
 			sprint(strchr(str, 0), "%.5lld (%L)	%A	%D", p->pc, p->lineno, a, &p->from);
-			if(p->reg != NREG) {
-				ch = 'R';
-				if(p->from.type == D_FREG)
-					ch = 'F';
-				sprint(strchr(str, 0), ",%c%d", ch, p->reg);
-			}
-			if(p->from3.type != D_NONE)
+			if(p->reg != 0)
+				sprint(strchr(str, 0), ",%R", p->reg);
+			if(p->from3.type != TYPE_NONE)
 				sprint(strchr(str, 0), ",%D", &p->from3);
 			sprint(strchr(str, 0), ",%D", &p->to);
 		}
@@ -159,7 +155,7 @@ Dconv(Fmt *fp)
 	a = va_arg(fp->args, Addr*);
 
 	if(fp->flags & FmtLong) {
-		if(a->type == D_CONST)
+		if(a->type == TYPE_CONST)
 			sprint(str, "$%d-%d", (int32)a->offset, (int32)(a->offset>>32));
 		else {
 			// ATEXT dst is not constant
@@ -173,89 +169,33 @@ Dconv(Fmt *fp)
 		sprint(str, "GOK-type(%d)", a->type);
 		break;
 
-	case D_NONE:
+	case TYPE_NONE:
 		str[0] = 0;
-		if(a->name != D_NONE || a->reg != NREG || a->sym != nil)
-			sprint(str, "%M(R%d)(NONE)", a, a->reg);
+		if(a->name != TYPE_NONE || a->reg != 0 || a->sym != nil)
+			sprint(str, "%M(%R)(NONE)", a, a->reg);
 		break;
 
-	case D_CONST:
-	case D_DCONST:
-		if(a->reg != NREG)
-			sprint(str, "$%M(R%d)", a, a->reg);
+	case TYPE_CONST:
+		if(a->reg != 0)
+			sprint(str, "$%M(%R)", a, a->reg);
 		else
 			sprint(str, "$%M", a);
 		break;
 
-	case D_OREG:
-		if(a->reg != NREG)
-			sprint(str, "%M(R%d)", a, a->reg);
+	case TYPE_MEM:
+		if(a->reg != 0)
+			sprint(str, "%M(%R)", a, a->reg);
 		else
 			sprint(str, "%M", a);
 		break;
 
-	case D_REG:
-		sprint(str, "R%d", a->reg);
-		if(a->name != D_NONE || a->sym != nil)
-			sprint(str, "%M(R%d)(REG)", a, a->reg);
-		break;
-
-	case D_FREG:
-		sprint(str, "F%d", a->reg);
-		if(a->name != D_NONE || a->sym != nil)
-			sprint(str, "%M(F%d)(REG)", a, a->reg);
-		break;
-
-	case D_CREG:
-		if(a->reg == NREG)
-			strcpy(str, "CR");
-		else
-			sprint(str, "CR%d", a->reg);
-		if(a->name != D_NONE || a->sym != nil)
-			sprint(str, "%M(C%d)(REG)", a, a->reg);
-		break;
-
-	case D_SPR:
-		if(a->name == D_NONE && a->sym == nil) {
-			switch((ulong)a->offset) {
-			case D_XER: sprint(str, "XER"); break;
-			case D_LR: sprint(str, "LR"); break;
-			case D_CTR: sprint(str, "CTR"); break;
-			default: sprint(str, "SPR(%lld)", a->offset); break;
-			}
-			break;
-		}
-		sprint(str, "SPR-GOK(%d)", a->reg);
-		if(a->name != D_NONE || a->sym != nil)
-			sprint(str, "%M(SPR-GOK%d)(REG)", a, a->reg);
-		break;
-
-	case D_DCR:
-		if(a->name == D_NONE && a->sym == nil) {
-			sprint(str, "DCR(%lld)", a->offset);
-			break;
-		}
-		sprint(str, "DCR-GOK(%d)", a->reg);
-		if(a->name != D_NONE || a->sym != nil)
-			sprint(str, "%M(DCR-GOK%d)(REG)", a, a->reg);
-		break;
-
-	case D_OPT:
-		sprint(str, "OPT(%d)", a->reg);
-		break;
-
-	case D_FPSCR:
-		if(a->reg == NREG)
-			strcpy(str, "FPSCR");
-		else
-			sprint(str, "FPSCR(%d)", a->reg);
-		break;
-
-	case D_MSR:
-		sprint(str, "MSR");
+	case TYPE_REG:
+		sprint(str, "%R", a->reg);
+		if(a->name != TYPE_NONE || a->sym != nil)
+			sprint(str, "%M(%R)(REG)", a, a->reg);
 		break;
 
-	case D_BRANCH:
+	case TYPE_BRANCH:
 		if(bigP->pcond != nil) {
 			v = bigP->pcond->pc;
 			//if(v >= INITTEXT)
@@ -272,12 +212,12 @@ Dconv(Fmt *fp)
 			sprint(str, "%lld(APC)", a->offset);
 		break;
 
-	case D_FCONST:
+	case TYPE_FCONST:
 		//sprint(str, "$%lux-%lux", a->ieee.h, a->ieee.l);
 		sprint(str, "$%.17g", a->u.dval);
 		break;
 
-	case D_SCONST:
+	case TYPE_SCONST:
 		sprint(str, "$\"%$\"", a->u.sval);
 		break;
 	}
@@ -309,7 +249,7 @@ Mconv(Fmt *fp)
 		sprint(str, "GOK-name(%d)", a->name);
 		break;
 
-	case D_NONE:
+	case TYPE_NONE:
 		l = a->offset;
 		if((vlong)l != a->offset)
 			sprint(str, "0x%llux", a->offset);
@@ -317,25 +257,25 @@ Mconv(Fmt *fp)
 			sprint(str, "%lld", a->offset);
 		break;
 
-	case D_EXTERN:
+	case NAME_EXTERN:
 		if(a->offset != 0)
 			sprint(str, "%s+%lld(SB)", s->name, a->offset);
 		else
 			sprint(str, "%s(SB)", s->name);
 		break;
 
-	case D_STATIC:
+	case NAME_STATIC:
 		sprint(str, "%s<>+%lld(SB)", s->name, a->offset);
 		break;
 
-	case D_AUTO:
+	case NAME_AUTO:
 		if(s == nil)
 			sprint(str, "%lld(SP)", -a->offset);
 		else
 			sprint(str, "%s-%lld(SP)", s->name, -a->offset);
 		break;
 
-	case D_PARAM:
+	case NAME_PARAM:
 		if(s == nil)
 			sprint(str, "%lld(FP)", a->offset);
 		else
@@ -349,15 +289,38 @@ Mconv(Fmt *fp)
 static int
 Rconv(Fmt *fp)
 {
-	char str[STRINGSZ];
 	int r;
 
 	r = va_arg(fp->args, int);
-	if(r < NREG)
-		sprint(str, "r%d", r);
-	else
-		sprint(str, "f%d", r-NREG);
-	return fmtstrcpy(fp, str);
+	if(r == 0)
+		return fmtstrcpy(fp, "NONE");
+	if(REG_R0 <= r && r <= REG_R31)
+		return fmtprint(fp, "R%d", r-REG_R0);
+	if(REG_F0 <= r && r <= REG_F31)
+		return fmtprint(fp, "F%d", r-REG_F0);
+	if(REG_C0 <= r && r <= REG_C7)
+		return fmtprint(fp, "C%d", r-REG_C0);
+	if(r == REG_CR)
+		return fmtstrcpy(fp, "CR");
+	if(REG_SPR0 <= r && r <= REG_SPR0+1023) {
+		switch(r) {
+		case REG_XER:
+			return fmtstrcpy(fp, "XER");
+		case REG_LR:
+			return fmtstrcpy(fp, "LR");
+		case REG_CTR:
+			return fmtstrcpy(fp, "CTR");
+		}
+		return fmtprint(fp, "SPR(%d)", r-REG_SPR0);
+	}
+	if(REG_DCR0 <= r && r <= REG_DCR0+1023)
+		return fmtprint(fp, "DCR(%d)", r-REG_DCR0);
+	if(r == REG_FPSCR)
+		return fmtstrcpy(fp, "FPSCR");
+	if(r == REG_MSR)
+		return fmtstrcpy(fp, "MSR");
+
+	return fmtprint(fp, "badreg(%d)", r);
 }
 
 static int
diff --git a/src/liblink/obj9.c b/src/liblink/obj9.c
index 5ac575593d..93c63722f8 100644
--- a/src/liblink/obj9.c
+++ b/src/liblink/obj9.c
@@ -37,31 +37,9 @@
 
 static Prog zprg = {
 	.as = AGOK,
-	.reg = NREG,
-	.from = {
-		.name = D_NONE,
-		.type = D_NONE,
-		.reg = NREG,
-	},
-	.from3 = {
-		.name = D_NONE,
-		.type = D_NONE,
-		.reg = NREG,
-	},
-	.to = {
-		.name = D_NONE,
-		.type = D_NONE,
-		.reg = NREG,
-	},
 };
 
 static int
-symtype(Addr *a)
-{
-	return a->name;
-}
-
-static int
 isdata(Prog *p)
 {
 	return p->as == ADATA || p->as == AGLOBL;
@@ -102,7 +80,7 @@ progedit(Link *ctxt, Prog *p)
 	p->from.class = 0;
 	p->to.class = 0;
 
-	// Rewrite BR/BL to symbol as D_BRANCH.
+	// Rewrite BR/BL to symbol as TYPE_BRANCH.
 	switch(p->as) {
 	case ABR:
 	case ABL:
@@ -110,14 +88,14 @@ progedit(Link *ctxt, Prog *p)
 	case ADUFFZERO:
 	case ADUFFCOPY:
 		if(p->to.sym != nil)
-			p->to.type = D_BRANCH;
+			p->to.type = TYPE_BRANCH;
 		break;
 	}
 
 	// Rewrite float constants to values stored in memory.
 	switch(p->as) {
 	case AFMOVS:
-		if(p->from.type == D_FCONST) {
+		if(p->from.type == TYPE_FCONST) {
 			uint32 i32;
 			float32 f32;
 			f32 = p->from.u.dval;
@@ -125,34 +103,34 @@ progedit(Link *ctxt, Prog *p)
 			sprint(literal, "$f32.%08ux", i32);
 			s = linklookup(ctxt, literal, 0);
 			s->size = 4;
-			p->from.type = D_OREG;
+			p->from.type = TYPE_MEM;
 			p->from.sym = s;
-			p->from.name = D_EXTERN;
+			p->from.name = NAME_EXTERN;
 			p->from.offset = 0;
 		}
 		break;
 	case AFMOVD:
-		if(p->from.type == D_FCONST) {
+		if(p->from.type == TYPE_FCONST) {
 			uint64 i64;
 			memmove(&i64, &p->from.u.dval, 8);
 			sprint(literal, "$f64.%016llux", i64);
 			s = linklookup(ctxt, literal, 0);
 			s->size = 8;
-			p->from.type = D_OREG;
+			p->from.type = TYPE_MEM;
 			p->from.sym = s;
-			p->from.name = D_EXTERN;
+			p->from.name = NAME_EXTERN;
 			p->from.offset = 0;
 		}
 		break;
 	case AMOVD:
 		// Put >32-bit constants in memory and load them
-		if(p->from.type == D_CONST && p->from.name == D_NONE && p->from.reg == NREG && (int32)p->from.offset != p->from.offset) {
+		if(p->from.type == TYPE_CONST && p->from.name == NAME_NONE && p->from.reg == 0 && (int32)p->from.offset != p->from.offset) {
 			sprint(literal, "$i64.%016llux", (uvlong)p->from.offset);
 			s = linklookup(ctxt, literal, 0);
 			s->size = 8;
-			p->from.type = D_OREG;
+			p->from.type = TYPE_MEM;
 			p->from.sym = s;
-			p->from.name = D_EXTERN;
+			p->from.name = NAME_EXTERN;
 			p->from.offset = 0;
 		}
 	}
@@ -160,21 +138,21 @@ progedit(Link *ctxt, Prog *p)
 	// Rewrite SUB constants into ADD.
 	switch(p->as) {
 	case ASUBC:
-		if(p->from.type == D_CONST) {
+		if(p->from.type == TYPE_CONST) {
 			p->from.offset = -p->from.offset;
 			p->as = AADDC;
 		}
 		break;
 
 	case ASUBCCC:
-		if(p->from.type == D_CONST) {
+		if(p->from.type == TYPE_CONST) {
 			p->from.offset = -p->from.offset;
 			p->as = AADDCCC;
 		}
 		break;
 
 	case ASUB:
-		if(p->from.type == D_CONST) {
+		if(p->from.type == TYPE_CONST) {
 			p->from.offset = -p->from.offset;
 			p->as = AADD;
 		}
@@ -198,7 +176,7 @@ parsetextconst(vlong arg, vlong *textstksiz, vlong *textarg)
 }
 
 static void
-addstacksplit(Link *ctxt, LSym *cursym)
+preprocess(Link *ctxt, LSym *cursym)
 {
 	Prog *p, *q, *p1, *p2, *q1;
 	int o, mov, aoffset;
@@ -246,7 +224,7 @@ addstacksplit(Link *ctxt, LSym *cursym)
 
 		case ANOR:
 			q = p;
-			if(p->to.type == D_REG)
+			if(p->to.type == TYPE_REG)
 				if(p->to.reg == REGZERO)
 					p->mark |= LABEL|SYNC;
 			break;
@@ -288,22 +266,8 @@ addstacksplit(Link *ctxt, LSym *cursym)
 		case AMOVWZ:
 		case AMOVD:
 			q = p;
-			switch(p->from.type) {
-			case D_MSR:
-			case D_SPR:
-			case D_FPSCR:
-			case D_CREG:
-			case D_DCR:
+			if(p->from.reg >= REG_SPECIAL || p->to.reg >= REG_SPECIAL)
 				p->mark |= LABEL|SYNC;
-			}
-			switch(p->to.type) {
-			case D_MSR:
-			case D_SPR:
-			case D_FPSCR:
-			case D_CREG:
-			case D_DCR:
-				p->mark |= LABEL|SYNC;
-			}
 			continue;
 
 		case AFABS:
@@ -429,9 +393,9 @@ addstacksplit(Link *ctxt, LSym *cursym)
 					q = appendp(ctxt, p);
 					q->as = AADD;
 					q->lineno = p->lineno;
-					q->from.type = D_CONST;
+					q->from.type = TYPE_CONST;
 					q->from.offset = -autosize;
-					q->to.type = D_REG;
+					q->to.type = TYPE_REG;
 					q->to.reg = REGSP;
 					q->spadj = +autosize;
 				}
@@ -453,17 +417,17 @@ addstacksplit(Link *ctxt, LSym *cursym)
 			q = appendp(ctxt, q);
 			q->as = AMOVD;
 			q->lineno = p->lineno;
-			q->from.type = D_SPR;
-			q->from.offset = D_LR;
-			q->to.type = D_REG;
+			q->from.type = TYPE_REG;
+			q->from.reg = REG_LR;
+			q->to.type = TYPE_REG;
 			q->to.reg = REGTMP;
 
 			q = appendp(ctxt, q);
 			q->as = mov;
 			q->lineno = p->lineno;
-			q->from.type = D_REG;
+			q->from.type = TYPE_REG;
 			q->from.reg = REGTMP;
-			q->to.type = D_OREG;
+			q->to.type = TYPE_MEM;
 			q->to.offset = aoffset;
 			q->to.reg = REGSP;
 			if(q->as == AMOVDU)
@@ -490,66 +454,66 @@ addstacksplit(Link *ctxt, LSym *cursym)
 
 				q = appendp(ctxt, q);
 				q->as = AMOVD;
-				q->from.type = D_OREG;
+				q->from.type = TYPE_MEM;
 				q->from.reg = REGG;
 				q->from.offset = 4*ctxt->arch->ptrsize; // G.panic
-				q->to.type = D_REG;
-				q->to.reg = 3;
+				q->to.type = TYPE_REG;
+				q->to.reg = REG_R3;
 
 				q = appendp(ctxt, q);
 				q->as = ACMP;
-				q->from.type = D_REG;
-				q->from.reg = 0;
-				q->to.type = D_REG;
-				q->to.reg = 3;
+				q->from.type = TYPE_REG;
+				q->from.reg = REG_R0;
+				q->to.type = TYPE_REG;
+				q->to.reg = REG_R3;
 
 				q = appendp(ctxt, q);
 				q->as = ABEQ;
-				q->to.type = D_BRANCH;
+				q->to.type = TYPE_BRANCH;
 				p1 = q;
 
 				q = appendp(ctxt, q);
 				q->as = AMOVD;
-				q->from.type = D_OREG;
-				q->from.reg = 3;
+				q->from.type = TYPE_MEM;
+				q->from.reg = REG_R3;
 				q->from.offset = 0; // Panic.argp
-				q->to.type = D_REG;
-				q->to.reg = 4;
+				q->to.type = TYPE_REG;
+				q->to.reg = REG_R4;
 
 				q = appendp(ctxt, q);
 				q->as = AADD;
-				q->from.type = D_CONST;
+				q->from.type = TYPE_CONST;
 				q->from.offset = autosize+8;
 				q->reg = REGSP;
-				q->to.type = D_REG;
-				q->to.reg = 5;
+				q->to.type = TYPE_REG;
+				q->to.reg = REG_R5;
 
 				q = appendp(ctxt, q);
 				q->as = ACMP;
-				q->from.type = D_REG;
-				q->from.reg = 4;
-				q->to.type = D_REG;
-				q->to.reg = 5;
+				q->from.type = TYPE_REG;
+				q->from.reg = REG_R4;
+				q->to.type = TYPE_REG;
+				q->to.reg = REG_R5;
 
 				q = appendp(ctxt, q);
 				q->as = ABNE;
-				q->to.type = D_BRANCH;
+				q->to.type = TYPE_BRANCH;
 				p2 = q;
 
 				q = appendp(ctxt, q);
 				q->as = AADD;
-				q->from.type = D_CONST;
+				q->from.type = TYPE_CONST;
 				q->from.offset = 8;
 				q->reg = REGSP;
-				q->to.type = D_REG;
-				q->to.reg = 6;
+				q->to.type = TYPE_REG;
+				q->to.reg = REG_R6;
 
 				q = appendp(ctxt, q);
 				q->as = AMOVD;
-				q->from.type = D_REG;
-				q->from.reg = 6;
-				q->to.type = D_OREG;
-				q->to.reg = 3;
+				q->from.type = TYPE_REG;
+				q->from.reg = REG_R6;
+				q->to.type = TYPE_MEM;
+				q->to.reg = REG_R3;
 				q->to.offset = 0; // Panic.argp
 
 				q = appendp(ctxt, q);
@@ -561,37 +525,37 @@ addstacksplit(Link *ctxt, LSym *cursym)
 			break;
 
 		case ARETURN:
-			if(p->from.type == D_CONST) {
+			if(p->from.type == TYPE_CONST) {
 				ctxt->diag("using BECOME (%P) is not supported!", p);
 				break;
 			}
 			if(p->to.sym) { // retjmp
 				p->as = ABR;
-				p->to.type = D_BRANCH;
+				p->to.type = TYPE_BRANCH;
 				break;
 			}
 			if(cursym->text->mark & LEAF) {
 				if(!autosize) {
 					p->as = ABR;
 					p->from = zprg.from;
-					p->to.type = D_SPR;
-					p->to.offset = D_LR;
+					p->to.type = TYPE_REG;
+					p->to.reg = REG_LR;
 					p->mark |= BRANCH;
 					break;
 				}
 
 				p->as = AADD;
-				p->from.type = D_CONST;
+				p->from.type = TYPE_CONST;
 				p->from.offset = autosize;
-				p->to.type = D_REG;
+				p->to.type = TYPE_REG;
 				p->to.reg = REGSP;
 				p->spadj = -autosize;
 
 				q = ctxt->arch->prg();
 				q->as = ABR;
 				q->lineno = p->lineno;
-				q->to.type = D_SPR;
-				q->to.offset = D_LR;
+				q->to.type = TYPE_REG;
+				q->to.reg = REG_LR;
 				q->mark |= BRANCH;
 				q->spadj = +autosize;
 
@@ -601,19 +565,19 @@ addstacksplit(Link *ctxt, LSym *cursym)
 			}
 
 			p->as = AMOVD;
-			p->from.type = D_OREG;
+			p->from.type = TYPE_MEM;
 			p->from.offset = 0;
 			p->from.reg = REGSP;
-			p->to.type = D_REG;
+			p->to.type = TYPE_REG;
 			p->to.reg = REGTMP;
 
 			q = ctxt->arch->prg();
 			q->as = AMOVD;
 			q->lineno = p->lineno;
-			q->from.type = D_REG;
+			q->from.type = TYPE_REG;
 			q->from.reg = REGTMP;
-			q->to.type = D_SPR;
-			q->to.offset = D_LR;
+			q->to.type = TYPE_REG;
+			q->to.reg = REG_LR;
 
 			q->link = p->link;
 			p->link = q;
@@ -624,10 +588,10 @@ addstacksplit(Link *ctxt, LSym *cursym)
 				q = ctxt->arch->prg();
 				q->as = AMOVD;
 				q->lineno = p->lineno;
-				q->from.type = D_OREG;
+				q->from.type = TYPE_MEM;
 				q->from.offset = 0;
 				q->from.reg = REGTMP;
-				q->to.type = D_REG;
+				q->to.type = TYPE_REG;
 				q->to.reg = REGTMP;
 
 				q->link = p->link;
@@ -639,9 +603,9 @@ addstacksplit(Link *ctxt, LSym *cursym)
 				q = ctxt->arch->prg();
 				q->as = AADD;
 				q->lineno = p->lineno;
-				q->from.type = D_CONST;
+				q->from.type = TYPE_CONST;
 				q->from.offset = autosize;
-				q->to.type = D_REG;
+				q->to.type = TYPE_REG;
 				q->to.reg = REGSP;
 				q->spadj = -autosize;
 
@@ -652,8 +616,8 @@ addstacksplit(Link *ctxt, LSym *cursym)
 			q1 = ctxt->arch->prg();
 			q1->as = ABR;
 			q1->lineno = p->lineno;
-			q1->to.type = D_SPR;
-			q1->to.offset = D_LR;
+			q1->to.type = TYPE_REG;
+			q1->to.reg = REG_LR;
 			q1->mark |= BRANCH;
 			q1->spadj = +autosize;
 
@@ -662,7 +626,7 @@ addstacksplit(Link *ctxt, LSym *cursym)
 			break;
 
 		case AADD:
-			if(p->to.type == D_REG && p->to.reg == REGSP && p->from.type == D_CONST)
+			if(p->to.type == TYPE_REG && p->to.reg == REGSP && p->from.type == TYPE_CONST)
 				p->spadj = -p->from.offset;
 			break;
 		}
@@ -723,13 +687,13 @@ stacksplit(Link *ctxt, Prog *p, int32 framesize, int noctxt)
 	// MOVD	g_stackguard(g), R3
 	p = appendp(ctxt, p);
 	p->as = AMOVD;
-	p->from.type = D_OREG;
+	p->from.type = TYPE_MEM;
 	p->from.reg = REGG;
 	p->from.offset = 2*ctxt->arch->ptrsize;	// G.stackguard0
 	if(ctxt->cursym->cfunc)
 		p->from.offset = 3*ctxt->arch->ptrsize;	// G.stackguard1
-	p->to.type = D_REG;
-	p->to.reg = 3;
+	p->to.type = TYPE_REG;
+	p->to.reg = REG_R3;
 
 	q = nil;
 	if(framesize <= StackSmall) {
@@ -737,9 +701,9 @@ stacksplit(Link *ctxt, Prog *p, int32 framesize, int noctxt)
 		//	CMP	stackguard, SP
 		p = appendp(ctxt, p);
 		p->as = ACMPU;
-		p->from.type = D_REG;
-		p->from.reg = 3;
-		p->to.type = D_REG;
+		p->from.type = TYPE_REG;
+		p->from.reg = REG_R3;
+		p->to.type = TYPE_REG;
 		p->to.reg = REGSP;
 	} else if(framesize <= StackBig) {
 		// large stack: SP-framesize < stackguard-StackSmall
@@ -747,18 +711,18 @@ stacksplit(Link *ctxt, Prog *p, int32 framesize, int noctxt)
 		//	CMP stackguard, R4
 		p = appendp(ctxt, p);
 		p->as = AADD;
-		p->from.type = D_CONST;
+		p->from.type = TYPE_CONST;
 		p->from.offset = -framesize;
 		p->reg = REGSP;
-		p->to.type = D_REG;
-		p->to.reg = 4;
+		p->to.type = TYPE_REG;
+		p->to.reg = REG_R4;
 
 		p = appendp(ctxt, p);
 		p->as = ACMPU;
-		p->from.type = D_REG;
-		p->from.reg = 3;
-		p->to.type = D_REG;
-		p->to.reg = 4;
+		p->from.type = TYPE_REG;
+		p->from.reg = REG_R3;
+		p->to.type = TYPE_REG;
+		p->to.reg = REG_R4;
 	} else {
 		// Such a large stack we need to protect against wraparound.
 		// If SP is close to zero:
@@ -777,64 +741,64 @@ stacksplit(Link *ctxt, Prog *p, int32 framesize, int noctxt)
 		//	CMPU	R31, R4
 		p = appendp(ctxt, p);
 		p->as = ACMP;
-		p->from.type = D_REG;
-		p->from.reg = 3;
-		p->to.type = D_CONST;
+		p->from.type = TYPE_REG;
+		p->from.reg = REG_R3;
+		p->to.type = TYPE_CONST;
 		p->to.offset = StackPreempt;
 
 		q = p = appendp(ctxt, p);
 		p->as = ABEQ;
-		p->to.type = D_BRANCH;
+		p->to.type = TYPE_BRANCH;
 
 		p = appendp(ctxt, p);
 		p->as = AADD;
-		p->from.type = D_CONST;
+		p->from.type = TYPE_CONST;
 		p->from.offset = StackGuard;
 		p->reg = REGSP;
-		p->to.type = D_REG;
-		p->to.reg = 4;
+		p->to.type = TYPE_REG;
+		p->to.reg = REG_R4;
 
 		p = appendp(ctxt, p);
 		p->as = ASUB;
-		p->from.type = D_REG;
-		p->from.reg = 3;
-		p->to.type = D_REG;
-		p->to.reg = 4;
+		p->from.type = TYPE_REG;
+		p->from.reg = REG_R3;
+		p->to.type = TYPE_REG;
+		p->to.reg = REG_R4;
 
 		p = appendp(ctxt, p);
 		p->as = AMOVD;
-		p->from.type = D_CONST;
+		p->from.type = TYPE_CONST;
 		p->from.offset = framesize + StackGuard - StackSmall;
-		p->to.type = D_REG;
+		p->to.type = TYPE_REG;
 		p->to.reg = REGTMP;
 
 		p = appendp(ctxt, p);
 		p->as = ACMPU;
-		p->from.type = D_REG;
+		p->from.type = TYPE_REG;
 		p->from.reg = REGTMP;
-		p->to.type = D_REG;
-		p->to.reg = 4;
+		p->to.type = TYPE_REG;
+		p->to.reg = REG_R4;
 	}
 
 	// q1: BLT	done
 	q1 = p = appendp(ctxt, p);
 	p->as = ABLT;
-	p->to.type = D_BRANCH;
+	p->to.type = TYPE_BRANCH;
 
 	// MOVD	LR, R5
 	p = appendp(ctxt, p);
 	p->as = AMOVD;
-	p->from.type = D_SPR;
-	p->from.offset = D_LR;
-	p->to.type = D_REG;
-	p->to.reg = 5;
+	p->from.type = TYPE_REG;
+	p->from.reg = REG_LR;
+	p->to.type = TYPE_REG;
+	p->to.reg = REG_R5;
 	if(q)
 		q->pcond = p;
 
 	// BL	runtime.morestack(SB)
 	p = appendp(ctxt, p);
 	p->as = ABL;
-	p->to.type = D_BRANCH;
+	p->to.type = TYPE_BRANCH;
 	if(ctxt->cursym->cfunc)
 		p->to.sym = linklookup(ctxt, "runtime.morestackc", 0);
 	else
@@ -843,7 +807,7 @@ stacksplit(Link *ctxt, Prog *p, int32 framesize, int noctxt)
 	// BR	start
 	p = appendp(ctxt, p);
 	p->as = ABR;
-	p->to.type = D_BRANCH;
+	p->to.type = TYPE_BRANCH;
 	p->pcond = ctxt->cursym->text->link;
 
 	// placeholder for q1's jump target
@@ -969,7 +933,7 @@ loop:
 		q = ctxt->arch->prg();
 		q->as = a;
 		q->lineno = p->lineno;
-		q->to.type = D_BRANCH;
+		q->to.type = TYPE_BRANCH;
 		q->to.offset = p->pc;
 		q->pcond = p;
 		p = q;
@@ -1011,7 +975,7 @@ LinkArch linkppc64 = {
 	.thechar = '9',
 	.endian = BigEndian,
 
-	.addstacksplit = addstacksplit,
+	.preprocess = preprocess,
 	.assemble = span9,
 	.datasize = datasize,
 	.follow = follow,
@@ -1020,25 +984,12 @@ LinkArch linkppc64 = {
 	.prg = prg,
 	.progedit = progedit,
 	.settextflag = settextflag,
-	.symtype = symtype,
 	.textflag = textflag,
 
 	.minlc = 4,
 	.ptrsize = 8,
 	.regsize = 8,
 
-	.D_ADDR = D_ADDR,
-	.D_AUTO = D_AUTO,
-	.D_BRANCH = D_BRANCH,
-	.D_CONST = D_CONST,
-	.D_EXTERN = D_EXTERN,
-	.D_FCONST = D_FCONST,
-	.D_NONE = D_NONE,
-	.D_PARAM = D_PARAM,
-	.D_SCONST = D_SCONST,
-	.D_STATIC = D_STATIC,
-	.D_OREG = D_OREG,
-
 	.ACALL = ABL,
 	.ADATA = ADATA,
 	.AEND = AEND,
@@ -1058,7 +1009,7 @@ LinkArch linkppc64le = {
 	.thechar = '9',
 	.endian = LittleEndian,
 
-	.addstacksplit = addstacksplit,
+	.preprocess = preprocess,
 	.assemble = span9,
 	.datasize = datasize,
 	.follow = follow,
@@ -1067,25 +1018,12 @@ LinkArch linkppc64le = {
 	.prg = prg,
 	.progedit = progedit,
 	.settextflag = settextflag,
-	.symtype = symtype,
 	.textflag = textflag,
 
 	.minlc = 4,
 	.ptrsize = 8,
 	.regsize = 8,
 
-	.D_ADDR = D_ADDR,
-	.D_AUTO = D_AUTO,
-	.D_BRANCH = D_BRANCH,
-	.D_CONST = D_CONST,
-	.D_EXTERN = D_EXTERN,
-	.D_FCONST = D_FCONST,
-	.D_NONE = D_NONE,
-	.D_PARAM = D_PARAM,
-	.D_SCONST = D_SCONST,
-	.D_STATIC = D_STATIC,
-	.D_OREG = D_OREG,
-
 	.ACALL = ABL,
 	.ADATA = ADATA,
 	.AEND = AEND,