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authorXiaolin Zhao <zhaoxiaolin@loongson.cn>2025-05-30 11:20:32 +0800
committerabner chenc <chenguoqi@loongson.cn>2025-08-03 18:26:56 -0700
commitb2960e35804aafbbb0df9973f99b034bea8c150a (patch)
treea4a5d3e0e422bf0da5b76b4563f01c6adf192332 /src/cmd/internal
parentabeeef1c08a589c2341f0d4e19ae49ec0892e797 (diff)
downloadgo-b2960e35804aafbbb0df9973f99b034bea8c150a.tar.xz
cmd/internal/obj/loong64: add {V,XV}{BITCLR/BITSET/BITREV}[I].{B/H/W/D} instructions support
Go asm syntax: V{BITCLR/BITSET/BITREV}{B/H/W/V} $1, V2, V3 XV{BITCLR/BITSET/BITREV}{B/H/W/V} $1, X2, X3 V{BITCLR/BITSET/BITREV}{B/H/W/V} VK, VJ, VD XV{BITCLR/BITSET/BITREV}{B/H/W/V} XK, XJ, XD Equivalent platform assembler syntax: v{bitclr/bitset/bitrev}i.{b/h/w/d} v3, v2, $1 xv{bitclr/bitset/bitrev}i.{b/h/w/d} x3, x2, $1 v{bitclr/bitset/bitrev}.{b/h/w/d} vd, vj, vk xv{bitclr/bitset/bitrev}.{b/h/w/d} xd, xj, xk Change-Id: I244f8ae316f72cc7ea01ca0139ac78c5616a3c5b Reviewed-on: https://go-review.googlesource.com/c/go/+/677435 Reviewed-by: Cherry Mui <cherryyz@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: abner chenc <chenguoqi@loongson.cn> Reviewed-by: Mark Freeman <mark@golang.org>
Diffstat (limited to 'src/cmd/internal')
-rw-r--r--src/cmd/internal/obj/loong64/a.out.go25
-rw-r--r--src/cmd/internal/obj/loong64/anames.go24
-rw-r--r--src/cmd/internal/obj/loong64/asm.go120
3 files changed, 169 insertions, 0 deletions
diff --git a/src/cmd/internal/obj/loong64/a.out.go b/src/cmd/internal/obj/loong64/a.out.go
index 193993ec4d..162e36be8c 100644
--- a/src/cmd/internal/obj/loong64/a.out.go
+++ b/src/cmd/internal/obj/loong64/a.out.go
@@ -816,6 +816,31 @@ const (
AXVPCNTW
AXVPCNTV
+ AVBITCLRB
+ AVBITCLRH
+ AVBITCLRW
+ AVBITCLRV
+ AVBITSETB
+ AVBITSETH
+ AVBITSETW
+ AVBITSETV
+ AVBITREVB
+ AVBITREVH
+ AVBITREVW
+ AVBITREVV
+ AXVBITCLRB
+ AXVBITCLRH
+ AXVBITCLRW
+ AXVBITCLRV
+ AXVBITSETB
+ AXVBITSETH
+ AXVBITSETW
+ AXVBITSETV
+ AXVBITREVB
+ AXVBITREVH
+ AXVBITREVW
+ AXVBITREVV
+
// LSX and LASX integer comparison instruction
AVSEQB
AXVSEQB
diff --git a/src/cmd/internal/obj/loong64/anames.go b/src/cmd/internal/obj/loong64/anames.go
index bf9b0722cc..d9ff3b7bc9 100644
--- a/src/cmd/internal/obj/loong64/anames.go
+++ b/src/cmd/internal/obj/loong64/anames.go
@@ -327,6 +327,30 @@ var Anames = []string{
"XVPCNTH",
"XVPCNTW",
"XVPCNTV",
+ "VBITCLRB",
+ "VBITCLRH",
+ "VBITCLRW",
+ "VBITCLRV",
+ "VBITSETB",
+ "VBITSETH",
+ "VBITSETW",
+ "VBITSETV",
+ "VBITREVB",
+ "VBITREVH",
+ "VBITREVW",
+ "VBITREVV",
+ "XVBITCLRB",
+ "XVBITCLRH",
+ "XVBITCLRW",
+ "XVBITCLRV",
+ "XVBITSETB",
+ "XVBITSETH",
+ "XVBITSETW",
+ "XVBITSETV",
+ "XVBITREVB",
+ "XVBITREVH",
+ "XVBITREVW",
+ "XVBITREVV",
"VSEQB",
"XVSEQB",
"VSEQH",
diff --git a/src/cmd/internal/obj/loong64/asm.go b/src/cmd/internal/obj/loong64/asm.go
index d6e5a3f476..2ed12698e6 100644
--- a/src/cmd/internal/obj/loong64/asm.go
+++ b/src/cmd/internal/obj/loong64/asm.go
@@ -1833,21 +1833,33 @@ func buildop(ctxt *obj.Link) {
opset(AVSRLB, r0)
opset(AVSRAB, r0)
opset(AVROTRB, r0)
+ opset(AVBITCLRB, r0)
+ opset(AVBITSETB, r0)
+ opset(AVBITREVB, r0)
case AXVSLLB:
opset(AXVSRLB, r0)
opset(AXVSRAB, r0)
opset(AXVROTRB, r0)
+ opset(AXVBITCLRB, r0)
+ opset(AXVBITSETB, r0)
+ opset(AXVBITREVB, r0)
case AVSLLH:
opset(AVSRLH, r0)
opset(AVSRAH, r0)
opset(AVROTRH, r0)
+ opset(AVBITCLRH, r0)
+ opset(AVBITSETH, r0)
+ opset(AVBITREVH, r0)
case AXVSLLH:
opset(AXVSRLH, r0)
opset(AXVSRAH, r0)
opset(AXVROTRH, r0)
+ opset(AXVBITCLRH, r0)
+ opset(AXVBITSETH, r0)
+ opset(AXVBITREVH, r0)
case AVSLLW:
opset(AVSRLW, r0)
@@ -1861,6 +1873,9 @@ func buildop(ctxt *obj.Link) {
opset(AVSUBHU, r0)
opset(AVSUBWU, r0)
opset(AVSUBVU, r0)
+ opset(AVBITCLRW, r0)
+ opset(AVBITSETW, r0)
+ opset(AVBITREVW, r0)
case AXVSLLW:
opset(AXVSRLW, r0)
@@ -1874,16 +1889,25 @@ func buildop(ctxt *obj.Link) {
opset(AXVSUBHU, r0)
opset(AXVSUBWU, r0)
opset(AXVSUBVU, r0)
+ opset(AXVBITCLRW, r0)
+ opset(AXVBITSETW, r0)
+ opset(AXVBITREVW, r0)
case AVSLLV:
opset(AVSRLV, r0)
opset(AVSRAV, r0)
opset(AVROTRV, r0)
+ opset(AVBITCLRV, r0)
+ opset(AVBITSETV, r0)
+ opset(AVBITREVV, r0)
case AXVSLLV:
opset(AXVSRLV, r0)
opset(AXVSRAV, r0)
opset(AXVROTRV, r0)
+ opset(AXVBITCLRV, r0)
+ opset(AXVBITSETV, r0)
+ opset(AXVBITREVV, r0)
case AVSETEQV:
opset(AVSETNEV, r0)
@@ -3518,6 +3542,54 @@ func (c *ctxt0) oprrr(a obj.As) uint32 {
return 0xea75 << 15 // xvfdiv.s
case AXVDIVD:
return 0xea76 << 15 // xvfdiv.d
+ case AVBITCLRB:
+ return 0xe218 << 15 // vbitclr.b
+ case AVBITCLRH:
+ return 0xe219 << 15 // vbitclr.h
+ case AVBITCLRW:
+ return 0xe21a << 15 // vbitclr.w
+ case AVBITCLRV:
+ return 0xe21b << 15 // vbitclr.d
+ case AVBITSETB:
+ return 0xe21c << 15 // vbitset.b
+ case AVBITSETH:
+ return 0xe21d << 15 // vbitset.h
+ case AVBITSETW:
+ return 0xe21e << 15 // vbitset.w
+ case AVBITSETV:
+ return 0xe21f << 15 // vbitset.d
+ case AVBITREVB:
+ return 0xe220 << 15 // vbitrev.b
+ case AVBITREVH:
+ return 0xe221 << 15 // vbitrev.h
+ case AVBITREVW:
+ return 0xe222 << 15 // vbitrev.w
+ case AVBITREVV:
+ return 0xe223 << 15 // vbitrev.d
+ case AXVBITCLRB:
+ return 0xea18 << 15 // xvbitclr.b
+ case AXVBITCLRH:
+ return 0xea19 << 15 // xvbitclr.h
+ case AXVBITCLRW:
+ return 0xea1a << 15 // xvbitclr.w
+ case AXVBITCLRV:
+ return 0xea1b << 15 // xvbitclr.d
+ case AXVBITSETB:
+ return 0xea1c << 15 // xvbitset.b
+ case AXVBITSETH:
+ return 0xea1d << 15 // xvbitset.h
+ case AXVBITSETW:
+ return 0xea1e << 15 // xvbitset.w
+ case AXVBITSETV:
+ return 0xea1f << 15 // xvbitset.d
+ case AXVBITREVB:
+ return 0xea20 << 15 // xvbitrev.b
+ case AXVBITREVH:
+ return 0xea21 << 15 // xvbitrev.h
+ case AXVBITREVW:
+ return 0xea22 << 15 // xvbitrev.w
+ case AXVBITREVV:
+ return 0xea23 << 15 // xvbitrev.d
}
if a < 0 {
@@ -4118,6 +4190,54 @@ func (c *ctxt0) opirr(a obj.As) uint32 {
return 0x1de6 << 18 // xvshuf4i.w
case AXVSHUF4IV:
return 0x1de7 << 18 // xvshuf4i.d
+ case AVBITCLRB:
+ return 0x1CC4<<18 | 0x1<<13 // vbitclri.b
+ case AVBITCLRH:
+ return 0x1CC4<<18 | 0x1<<14 // vbitclri.h
+ case AVBITCLRW:
+ return 0x1CC4<<18 | 0x1<<15 // vbitclri.w
+ case AVBITCLRV:
+ return 0x1CC4<<18 | 0x1<<16 // vbitclri.d
+ case AVBITSETB:
+ return 0x1CC5<<18 | 0x1<<13 // vbitseti.b
+ case AVBITSETH:
+ return 0x1CC5<<18 | 0x1<<14 // vbitseti.h
+ case AVBITSETW:
+ return 0x1CC5<<18 | 0x1<<15 // vbitseti.w
+ case AVBITSETV:
+ return 0x1CC5<<18 | 0x1<<16 // vbitseti.d
+ case AVBITREVB:
+ return 0x1CC6<<18 | 0x1<<13 // vbitrevi.b
+ case AVBITREVH:
+ return 0x1CC6<<18 | 0x1<<14 // vbitrevi.h
+ case AVBITREVW:
+ return 0x1CC6<<18 | 0x1<<15 // vbitrevi.w
+ case AVBITREVV:
+ return 0x1CC6<<18 | 0x1<<16 // vbitrevi.d
+ case AXVBITCLRB:
+ return 0x1DC4<<18 | 0x1<<13 // xvbitclri.b
+ case AXVBITCLRH:
+ return 0x1DC4<<18 | 0x1<<14 // xvbitclri.h
+ case AXVBITCLRW:
+ return 0x1DC4<<18 | 0x1<<15 // xvbitclri.w
+ case AXVBITCLRV:
+ return 0x1DC4<<18 | 0x1<<16 // xvbitclri.d
+ case AXVBITSETB:
+ return 0x1DC5<<18 | 0x1<<13 // xvbitseti.b
+ case AXVBITSETH:
+ return 0x1DC5<<18 | 0x1<<14 // xvbitseti.h
+ case AXVBITSETW:
+ return 0x1DC5<<18 | 0x1<<15 // xvbitseti.w
+ case AXVBITSETV:
+ return 0x1DC5<<18 | 0x1<<16 // xvbitseti.d
+ case AXVBITREVB:
+ return 0x1DC6<<18 | 0x1<<13 // xvbitrevi.b
+ case AXVBITREVH:
+ return 0x1DC6<<18 | 0x1<<14 // xvbitrevi.h
+ case AXVBITREVW:
+ return 0x1DC6<<18 | 0x1<<15 // xvbitrevi.w
+ case AXVBITREVV:
+ return 0x1DC6<<18 | 0x1<<16 // xvbitrevi.d
}
if a < 0 {