all: eliminate unnecessary type conversions

Found by github.com/mdempsky/unconvert

Change-Id: I88ce10390a49ba768a4deaa0df9057c93c1164de
GitHub-Last-Rev: 3b0f7e8f74f58340637f33287c238765856b2483
GitHub-Pull-Request: golang/go#75974
Reviewed-on: https://go-review.googlesource.com/c/go/+/712940
LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
Reviewed-by: Keith Randall <khr@golang.org>
Auto-Submit: Keith Randall <khr@golang.org>
Reviewed-by: Keith Randall <khr@google.com>
Reviewed-by: David Chase <drchase@google.com>

15 files changed, 35 insertions, 35 deletions

diff --git a/src/cmd/internal/obj/arm/a.out.go b/src/cmd/internal/obj/arm/a.out.go
index fabd0cb50f..d33b75120d 100644
--- a/src/cmd/internal/obj/arm/a.out.go
+++ b/src/cmd/internal/obj/arm/a.out.go
@@ -115,7 +115,7 @@ var ARMDWARFRegisters = map[int16]int16{}
 func init() {
 	// f assigns dwarfregisters[from:to] = (base):(step*(to-from)+base)
 	f := func(from, to, base, step int16) {
-		for r := int16(from); r <= to; r++ {
+		for r := from; r <= to; r++ {
 			ARMDWARFRegisters[r] = step*(r-from) + base
 		}
 	}
diff --git a/src/cmd/internal/obj/arm64/asm7.go b/src/cmd/internal/obj/arm64/asm7.go
index 3cb4be436b..befd1bee13 100644
--- a/src/cmd/internal/obj/arm64/asm7.go
+++ b/src/cmd/internal/obj/arm64/asm7.go
@@ -1163,7 +1163,7 @@ func span7(ctxt *obj.Link, cursym *obj.LSym, newprog obj.ProgAlloc) {
 		switch p.As {
 		case obj.APCALIGN, obj.APCALIGNMAX:
 			v := obj.AlignmentPaddingLength(int32(p.Pc), p, c.ctxt)
-			for i := 0; i < int(v/4); i++ {
+			for i := 0; i < v/4; i++ {
 				// emit ANOOP instruction by the padding size
 				buf.emit(OP_NOOP)
 			}
@@ -4017,7 +4017,7 @@ func (c *ctxt7) asmout(p *obj.Prog, out []uint32) (count int) {
 
 		// Handle smaller unaligned and negative offsets via addition or subtraction.
 		if v >= -4095 && v <= 4095 {
-			o1 = c.oaddi12(p, v, REGTMP, int16(rt))
+			o1 = c.oaddi12(p, v, REGTMP, rt)
 			o2 = c.olsr12u(p, c.opstr(p, p.As), 0, REGTMP, rf)
 			break
 		}
@@ -4073,7 +4073,7 @@ func (c *ctxt7) asmout(p *obj.Prog, out []uint32) (count int) {
 
 		// Handle smaller unaligned and negative offsets via addition or subtraction.
 		if v >= -4095 && v <= 4095 {
-			o1 = c.oaddi12(p, v, REGTMP, int16(rf))
+			o1 = c.oaddi12(p, v, REGTMP, rf)
 			o2 = c.olsr12u(p, c.opldr(p, p.As), 0, REGTMP, rt)
 			break
 		}
@@ -4852,7 +4852,7 @@ func (c *ctxt7) asmout(p *obj.Prog, out []uint32) (count int) {
 		if p.Pool != nil {
 			c.ctxt.Diag("%v: unused constant in pool (%v)\n", p, v)
 		}
-		o1 = c.oaddi(p, AADD, lo, REGTMP, int16(rf))
+		o1 = c.oaddi(p, AADD, lo, REGTMP, rf)
 		o2 = c.oaddi(p, AADD, hi, REGTMP, REGTMP)
 		o3 = c.opldpstp(p, o, 0, REGTMP, rt1, rt2, 1)
 		break
@@ -4917,7 +4917,7 @@ func (c *ctxt7) asmout(p *obj.Prog, out []uint32) (count int) {
 		if p.Pool != nil {
 			c.ctxt.Diag("%v: unused constant in pool (%v)\n", p, v)
 		}
-		o1 = c.oaddi(p, AADD, lo, REGTMP, int16(rt))
+		o1 = c.oaddi(p, AADD, lo, REGTMP, rt)
 		o2 = c.oaddi(p, AADD, hi, REGTMP, REGTMP)
 		o3 = c.opldpstp(p, o, 0, REGTMP, rf1, rf2, 0)
 		break
@@ -5293,7 +5293,7 @@ func (c *ctxt7) asmout(p *obj.Prog, out []uint32) (count int) {
 		}
 
 		o1 = c.opirr(p, p.As)
-		o1 |= (uint32(r&31) << 5) | (uint32((imm>>3)&0xfff) << 10) | (uint32(v & 31))
+		o1 |= (uint32(r&31) << 5) | ((imm >> 3) & 0xfff << 10) | (v & 31)
 
 	case 92: /* vmov Vn.<T>[index], Vd.<T>[index] */
 		rf := int(p.From.Reg)
@@ -5846,7 +5846,7 @@ func (c *ctxt7) asmout(p *obj.Prog, out []uint32) (count int) {
 	out[3] = o4
 	out[4] = o5
 
-	return int(o.size(c.ctxt, p) / 4)
+	return o.size(c.ctxt, p) / 4
 }
 
 func (c *ctxt7) addrRelocType(p *obj.Prog) objabi.RelocType {
@@ -7854,12 +7854,12 @@ func (c *ctxt7) encRegShiftOrExt(p *obj.Prog, a *obj.Addr, r int16) uint32 {
 
 // pack returns the encoding of the "Q" field and two arrangement specifiers.
 func pack(q uint32, arngA, arngB uint8) uint32 {
-	return uint32(q)<<16 | uint32(arngA)<<8 | uint32(arngB)
+	return q<<16 | uint32(arngA)<<8 | uint32(arngB)
 }
 
 // ARM64RegisterExtension constructs an ARM64 register with extension or arrangement.
 func ARM64RegisterExtension(a *obj.Addr, ext string, reg, num int16, isAmount, isIndex bool) error {
-	Rnum := (reg & 31) + int16(num<<5)
+	Rnum := (reg & 31) + num<<5
 	if isAmount {
 		if num < 0 || num > 7 {
 			return errors.New("index shift amount is out of range")
diff --git a/src/cmd/internal/obj/dwarf.go b/src/cmd/internal/obj/dwarf.go
index c6f321e3e5..670b0f3510 100644
--- a/src/cmd/internal/obj/dwarf.go
+++ b/src/cmd/internal/obj/dwarf.go
@@ -219,7 +219,7 @@ func (c dwCtxt) AddUint16(s dwarf.Sym, i uint16) {
 	c.AddInt(s, 2, int64(i))
 }
 func (c dwCtxt) AddUint8(s dwarf.Sym, i uint8) {
-	b := []byte{byte(i)}
+	b := []byte{i}
 	c.AddBytes(s, b)
 }
 func (c dwCtxt) AddBytes(s dwarf.Sym, b []byte) {
diff --git a/src/cmd/internal/obj/link.go b/src/cmd/internal/obj/link.go
index b7e116bae3..9f3814e748 100644
--- a/src/cmd/internal/obj/link.go
+++ b/src/cmd/internal/obj/link.go
@@ -753,12 +753,12 @@ func (ft *WasmFuncType) Read(b []byte) {
 	ft.Params = make([]WasmField, readUint32())
 	for i := range ft.Params {
 		ft.Params[i].Type = WasmFieldType(readByte())
-		ft.Params[i].Offset = int64(readInt64())
+		ft.Params[i].Offset = readInt64()
 	}
 	ft.Results = make([]WasmField, readUint32())
 	for i := range ft.Results {
 		ft.Results[i].Type = WasmFieldType(readByte())
-		ft.Results[i].Offset = int64(readInt64())
+		ft.Results[i].Offset = readInt64()
 	}
 }
 
diff --git a/src/cmd/internal/obj/loong64/a.out.go b/src/cmd/internal/obj/loong64/a.out.go
index 100e99b1c4..3cdbeb12a3 100644
--- a/src/cmd/internal/obj/loong64/a.out.go
+++ b/src/cmd/internal/obj/loong64/a.out.go
@@ -236,7 +236,7 @@ var LOONG64DWARFRegisters = map[int16]int16{}
 func init() {
 	// f assigns dwarfregisters[from:to] = (base):(to-from+base)
 	f := func(from, to, base int16) {
-		for r := int16(from); r <= to; r++ {
+		for r := from; r <= to; r++ {
 			LOONG64DWARFRegisters[r] = (r - from) + base
 		}
 	}
diff --git a/src/cmd/internal/obj/mips/a.out.go b/src/cmd/internal/obj/mips/a.out.go
index 5439f0e4aa..b7e82c50f4 100644
--- a/src/cmd/internal/obj/mips/a.out.go
+++ b/src/cmd/internal/obj/mips/a.out.go
@@ -245,7 +245,7 @@ var MIPSDWARFRegisters = map[int16]int16{}
 func init() {
 	// f assigns dwarfregisters[from:to] = (base):(to-from+base)
 	f := func(from, to, base int16) {
-		for r := int16(from); r <= to; r++ {
+		for r := from; r <= to; r++ {
 			MIPSDWARFRegisters[r] = (r - from) + base
 		}
 	}
diff --git a/src/cmd/internal/obj/objfile.go b/src/cmd/internal/obj/objfile.go
index 3299fbf4e6..4401f1bb74 100644
--- a/src/cmd/internal/obj/objfile.go
+++ b/src/cmd/internal/obj/objfile.go
@@ -166,7 +166,7 @@ func WriteObjFile(ctxt *Link, b *bio.Writer) {
 			w.Uint32(uint32(dataOff))
 			dataOff += int64(len(s.P))
 			if file := s.File(); file != nil {
-				dataOff += int64(file.Size)
+				dataOff += file.Size
 			}
 		}
 	}
diff --git a/src/cmd/internal/obj/ppc64/a.out.go b/src/cmd/internal/obj/ppc64/a.out.go
index aa7bcd3068..d103ebcfc3 100644
--- a/src/cmd/internal/obj/ppc64/a.out.go
+++ b/src/cmd/internal/obj/ppc64/a.out.go
@@ -311,7 +311,7 @@ var PPC64DWARFRegisters = map[int16]int16{}
 func init() {
 	// f assigns dwarfregister[from:to] = (base):(to-from+base)
 	f := func(from, to, base int16) {
-		for r := int16(from); r <= to; r++ {
+		for r := from; r <= to; r++ {
 			PPC64DWARFRegisters[r] = r - from + base
 		}
 	}
diff --git a/src/cmd/internal/obj/ppc64/asm9.go b/src/cmd/internal/obj/ppc64/asm9.go
index dcd3aa59a4..a39c206c22 100644
--- a/src/cmd/internal/obj/ppc64/asm9.go
+++ b/src/cmd/internal/obj/ppc64/asm9.go
@@ -2655,7 +2655,7 @@ func asmout(c *ctxt9, p *obj.Prog, o *Optab, out *[5]uint32) {
 	case 9: /* RLDC Ra, $sh, $mb, Rb */
 		sh := uint32(p.RestArgs[0].Addr.Offset) & 0x3F
 		mb := uint32(p.RestArgs[1].Addr.Offset) & 0x3F
-		o1 = AOP_RRR(c.opirr(p.As), uint32(p.From.Reg), uint32(p.To.Reg), (uint32(sh) & 0x1F))
+		o1 = AOP_RRR(c.opirr(p.As), uint32(p.From.Reg), uint32(p.To.Reg), (sh & 0x1F))
 		o1 |= (sh & 0x20) >> 4 // sh[5] is placed in bit 1.
 		o1 |= (mb & 0x1F) << 6 // mb[0:4] is placed in bits 6-10.
 		o1 |= (mb & 0x20)      // mb[5] is placed in bit 5
@@ -2784,7 +2784,7 @@ func asmout(c *ctxt9, p *obj.Prog, o *Optab, out *[5]uint32) {
 			if n > b || b > 63 {
 				c.ctxt.Diag("Invalid n or b for CLRLSLDI: %x %x\n%v", n, b, p)
 			}
-			o1 = AOP_MD(OP_RLDIC, uint32(p.To.Reg), uint32(r), uint32(n), uint32(b)-uint32(n))
+			o1 = AOP_MD(OP_RLDIC, uint32(p.To.Reg), r, uint32(n), uint32(b)-uint32(n))
 
 		default:
 			c.ctxt.Diag("unexpected op in rldc case\n%v", p)
@@ -2967,7 +2967,7 @@ func asmout(c *ctxt9, p *obj.Prog, o *Optab, out *[5]uint32) {
 			c.ctxt.Diag("%v is not supported", p)
 		}
 		if o.ispfx {
-			o1, o2 = pfxadd(int16(p.To.Reg), int16(r), PFX_R_ABS, d)
+			o1, o2 = pfxadd(p.To.Reg, int16(r), PFX_R_ABS, d)
 		} else if o.size == 8 {
 			o1 = LOP_IRR(OP_ORI, REGTMP, REGZERO, uint32(int32(d)))          // tmp = uint16(d)
 			o2 = AOP_RRR(c.oprrr(p.As), uint32(p.To.Reg), REGTMP, uint32(r)) // to = tmp + from
@@ -2979,7 +2979,7 @@ func asmout(c *ctxt9, p *obj.Prog, o *Optab, out *[5]uint32) {
 		} else {
 			// For backwards compatibility with GOPPC64 < 10, generate 34b constants in register.
 			o1 = LOP_IRR(OP_ADDIS, REGZERO, REGTMP, uint32(d>>32)) // tmp = sign_extend((d>>32)&0xFFFF0000)
-			o2 = loadl16(REGTMP, int64(d>>16))                     // tmp |= (d>>16)&0xFFFF
+			o2 = loadl16(REGTMP, d>>16)                            // tmp |= (d>>16)&0xFFFF
 			o3 = AOP_MD(OP_RLDICR, REGTMP, REGTMP, 16, 63-16)      // tmp <<= 16
 			o4 = loadl16(REGTMP, int64(uint16(d)))                 // tmp |= d&0xFFFF
 			o5 = AOP_RRR(c.oprrr(p.As), uint32(p.To.Reg), REGTMP, uint32(r))
@@ -3080,9 +3080,9 @@ func asmout(c *ctxt9, p *obj.Prog, o *Optab, out *[5]uint32) {
 
 		if o.ispfx {
 			if rel == nil {
-				o1, o2 = pfxadd(int16(p.To.Reg), int16(r), PFX_R_ABS, v)
+				o1, o2 = pfxadd(p.To.Reg, int16(r), PFX_R_ABS, v)
 			} else {
-				o1, o2 = pfxadd(int16(p.To.Reg), REG_R0, PFX_R_PCREL, 0)
+				o1, o2 = pfxadd(p.To.Reg, REG_R0, PFX_R_PCREL, 0)
 				rel.Type = objabi.R_ADDRPOWER_PCREL34
 			}
 		}
@@ -3519,7 +3519,7 @@ func asmout(c *ctxt9, p *obj.Prog, o *Optab, out *[5]uint32) {
 			v |= 1 << 8
 		}
 
-		o1 = AOP_RRR(OP_MTCRF, uint32(p.From.Reg), 0, 0) | uint32(v)<<12
+		o1 = AOP_RRR(OP_MTCRF, uint32(p.From.Reg), 0, 0) | v<<12
 
 	case 70: /* cmp* r,r,cr or cmp*i r,i,cr or fcmp f,f,cr or cmpeqb r,r */
 		r := uint32(p.Reg&7) << 2
diff --git a/src/cmd/internal/obj/riscv/obj.go b/src/cmd/internal/obj/riscv/obj.go
index 74699cc398..8c4140ec5c 100644
--- a/src/cmd/internal/obj/riscv/obj.go
+++ b/src/cmd/internal/obj/riscv/obj.go
@@ -905,7 +905,7 @@ func stacksplit(ctxt *obj.Link, p *obj.Prog, cursym *obj.LSym, newprog obj.ProgA
 		to_done = p
 	} else {
 		// large stack: SP-framesize < stackguard-StackSmall
-		offset := int64(framesize) - abi.StackSmall
+		offset := framesize - abi.StackSmall
 		if framesize > abi.StackBig {
 			// Such a large stack we need to protect against underflow.
 			// The runtime guarantees SP > objabi.StackBig, but
@@ -3837,7 +3837,7 @@ func instructionsForProg(p *obj.Prog) []*instruction {
 		if err != nil {
 			p.Ctxt.Diag("%v: %v", p, err)
 		}
-		ins.imm = int64(vtype)
+		ins.imm = vtype
 		if ins.as == AVSETIVLI {
 			if p.From.Type != obj.TYPE_CONST {
 				p.Ctxt.Diag("%v: expected immediate value", p)
diff --git a/src/cmd/internal/obj/s390x/a.out.go b/src/cmd/internal/obj/s390x/a.out.go
index dc715182f5..caf5ec0935 100644
--- a/src/cmd/internal/obj/s390x/a.out.go
+++ b/src/cmd/internal/obj/s390x/a.out.go
@@ -156,7 +156,7 @@ var S390XDWARFRegisters = map[int16]int16{}
 func init() {
 	// f assigns dwarfregisters[from:to by step] = (base):((to-from)/step+base)
 	f := func(from, step, to, base int16) {
-		for r := int16(from); r <= to; r += step {
+		for r := from; r <= to; r += step {
 			S390XDWARFRegisters[r] = (r-from)/step + base
 		}
 	}
diff --git a/src/cmd/internal/obj/s390x/asmz.go b/src/cmd/internal/obj/s390x/asmz.go
index 97de5a4a08..3706bb1b74 100644
--- a/src/cmd/internal/obj/s390x/asmz.go
+++ b/src/cmd/internal/obj/s390x/asmz.go
@@ -3130,7 +3130,7 @@ func (c *ctxtz) asmout(p *obj.Prog, asm *[]byte) {
 		case ARISBLG, ARISBLGZ:
 			opcode = op_RISBLG
 		}
-		zRIE(_f, uint32(opcode), uint32(r1), uint32(r2), 0, uint32(i3), uint32(i4), 0, uint32(i5), asm)
+		zRIE(_f, opcode, uint32(r1), uint32(r2), 0, uint32(i3), uint32(i4), 0, uint32(i5), asm)
 
 	case 15: // br/bl (reg)
 		r := p.To.Reg
@@ -3183,8 +3183,8 @@ func (c *ctxtz) asmout(p *obj.Prog, asm *[]byte) {
 		}
 		switch p.As {
 		case ASUB:
-			zRIL(_a, op_LGFI, uint32(regtmp(p)), uint32(v), asm)
-			zRRF(op_SLGRK, uint32(regtmp(p)), 0, uint32(p.To.Reg), uint32(r), asm)
+			zRIL(_a, op_LGFI, regtmp(p), uint32(v), asm)
+			zRRF(op_SLGRK, regtmp(p), 0, uint32(p.To.Reg), uint32(r), asm)
 		case ASUBC:
 			if r != p.To.Reg {
 				zRRE(op_LGR, uint32(p.To.Reg), uint32(r), asm)
@@ -3603,7 +3603,7 @@ func (c *ctxtz) asmout(p *obj.Prog, asm *[]byte) {
 				if opcode == op_MVI {
 					opcode = op_MVIY
 				} else {
-					zRXY(op_LAY, uint32(regtmp(p)), 0, uint32(r), uint32(d), asm)
+					zRXY(op_LAY, regtmp(p), 0, uint32(r), uint32(d), asm)
 					r = int16(regtmp(p))
 					d = 0
 				}
diff --git a/src/cmd/internal/obj/s390x/rotate.go b/src/cmd/internal/obj/s390x/rotate.go
index 5407c8df11..d3cb44cabf 100644
--- a/src/cmd/internal/obj/s390x/rotate.go
+++ b/src/cmd/internal/obj/s390x/rotate.go
@@ -67,7 +67,7 @@ func (r RotateParams) RotateLeft(amount uint8) RotateParams {
 // OutMask provides a mask representing the selected bits.
 func (r RotateParams) OutMask() uint64 {
 	// Note: z must be unsigned for bootstrap compiler
-	z := uint8(63-r.End+r.Start) & 63 // number of zero bits in mask
+	z := (63 - r.End + r.Start) & 63 // number of zero bits in mask
 	return bits.RotateLeft64(^uint64(0)<<z, -int(r.Start))
 }
 
diff --git a/src/cmd/internal/obj/x86/asm6.go b/src/cmd/internal/obj/x86/asm6.go
index 03718fbb31..4110fd7d8a 100644
--- a/src/cmd/internal/obj/x86/asm6.go
+++ b/src/cmd/internal/obj/x86/asm6.go
@@ -2156,7 +2156,7 @@ func span6(ctxt *obj.Link, s *obj.LSym, newprog obj.ProgAlloc) {
 				v := obj.AlignmentPadding(c, p, ctxt, s)
 				if v > 0 {
 					s.Grow(int64(c) + int64(v))
-					fillnop(s.P[c:], int(v))
+					fillnop(s.P[c:], v)
 				}
 				p.Pc = int64(c)
 				c += int32(v)
@@ -3277,7 +3277,7 @@ func (ab *AsmBuf) Put(b []byte) {
 // Literal Z cases usually have "Zlit" in their name (Zlit, Zlitr_m, Zlitm_r).
 func (ab *AsmBuf) PutOpBytesLit(offset int, op *opBytes) {
 	for int(op[offset]) != 0 {
-		ab.Put1(byte(op[offset]))
+		ab.Put1(op[offset])
 		offset++
 	}
 }
diff --git a/src/cmd/internal/obj/x86/asm_test.go b/src/cmd/internal/obj/x86/asm_test.go
index 458a91258a..1165582983 100644
--- a/src/cmd/internal/obj/x86/asm_test.go
+++ b/src/cmd/internal/obj/x86/asm_test.go
@@ -286,7 +286,7 @@ func TestRegIndex(t *testing.T) {
 			have := regIndex(int16(reg))
 			want := index
 			if have != want {
-				regName := rconv(int(reg))
+				regName := rconv(reg)
 				t.Errorf("regIndex(%s):\nhave: %d\nwant: %d",
 					regName, have, want)
 			}