diff options
| author | Xueqi Luo <1824368278@qq.com> | 2025-11-27 06:37:04 +0000 |
|---|---|---|
| committer | Meng Zhuo <mengzhuo1203@gmail.com> | 2026-03-26 19:11:49 -0700 |
| commit | 91d1a883768b8b38fe79eefd820063b2b593f23a (patch) | |
| tree | 7bd4d26297825e0580049427093a8cc581cdcd11 /src/cmd/internal/obj | |
| parent | 87fae3622dacca9cfa5026c712df40af694a4e6a (diff) | |
| download | go-91d1a883768b8b38fe79eefd820063b2b593f23a.tar.xz | |
cmd/internal/obj/riscv: add assembly support of Zbc extension
The Zbc extension adds carry-less multiplication instructions for
polynomial arithmetic over GF(2), which is used in cryptographic
algorithms and error-correcting codes. The instructions included
are: clmul, clmulh, and clmulr.
Change-Id: I77a40add1a795c7b90b478dc65835c689e82167a
GitHub-Last-Rev: 53790f0aafa46af2ed24183f58292df7f9fb224a
GitHub-Pull-Request: golang/go#76301
Reviewed-on: https://go-review.googlesource.com/c/go/+/720520
Reviewed-by: Carlos Amedee <carlos@golang.org>
Reviewed-by: Joel Sing <joel@sing.id.au>
Reviewed-by: Dmitri Shuralyov <dmitshur@google.com>
LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
Diffstat (limited to 'src/cmd/internal/obj')
| -rw-r--r-- | src/cmd/internal/obj/riscv/anames.go | 3 | ||||
| -rw-r--r-- | src/cmd/internal/obj/riscv/cpu.go | 7 | ||||
| -rw-r--r-- | src/cmd/internal/obj/riscv/inst.go | 8 | ||||
| -rw-r--r-- | src/cmd/internal/obj/riscv/obj.go | 7 |
4 files changed, 22 insertions, 3 deletions
diff --git a/src/cmd/internal/obj/riscv/anames.go b/src/cmd/internal/obj/riscv/anames.go index 6c48e2f7de..1f777dd195 100644 --- a/src/cmd/internal/obj/riscv/anames.go +++ b/src/cmd/internal/obj/riscv/anames.go @@ -263,6 +263,9 @@ var Anames = []string{ "RORW", "ORCB", "REV8", + "CLMUL", + "CLMULH", + "CLMULR", "BCLR", "BCLRI", "BEXT", diff --git a/src/cmd/internal/obj/riscv/cpu.go b/src/cmd/internal/obj/riscv/cpu.go index a91395dd38..64a1a02a53 100644 --- a/src/cmd/internal/obj/riscv/cpu.go +++ b/src/cmd/internal/obj/riscv/cpu.go @@ -672,7 +672,7 @@ const ( ASEXTH AZEXTH - // 28.4.3: Bitwise Rotation (Zbb) + // 28.4.2: Bitwise Rotation (Zbb) AROL AROLW AROR @@ -682,6 +682,11 @@ const ( AORCB AREV8 + // 28.4.3: Carry-less multiplication (Zbc) + ACLMUL + ACLMULH + ACLMULR + // 28.4.4: Single-bit Instructions (Zbs) ABCLR ABCLRI diff --git a/src/cmd/internal/obj/riscv/inst.go b/src/cmd/internal/obj/riscv/inst.go index a5b3acdb18..a41b35d5a3 100644 --- a/src/cmd/internal/obj/riscv/inst.go +++ b/src/cmd/internal/obj/riscv/inst.go @@ -1,4 +1,4 @@ -// Code generated by ./parse.py -go rv64_a rv64_c rv64_d rv64_f rv64_i rv64_m rv64_q rv64_zba rv64_zbb rv64_zbs rv_a rv_c rv_c_d rv_d rv_f rv_i rv_m rv_q rv_s rv_system rv_v rv_zba rv_zbb rv_zbs rv_zicond rv_zicsr; DO NOT EDIT. +// Code generated by ./parse.py -go rv64_a rv64_c rv64_d rv64_f rv64_i rv64_m rv64_q rv64_zba rv64_zbb rv64_zbs rv_a rv_c rv_c_d rv_d rv_f rv_i rv_m rv_q rv_s rv_system rv_v rv_zba rv_zbb rv_zbc rv_zbs rv_zicond rv_zicsr; DO NOT EDIT. package riscv import "cmd/internal/obj" @@ -170,6 +170,12 @@ func encode(a obj.As) *inst { return &inst{0x2, 0x4, 0x1, 0x0, 0, 0x0} case ACXOR: return &inst{0x21, 0x0, 0x1, 0x0, 0, 0x0} + case ACLMUL: + return &inst{0x33, 0x1, 0x0, 0x0, 160, 0x5} + case ACLMULH: + return &inst{0x33, 0x3, 0x0, 0x0, 160, 0x5} + case ACLMULR: + return &inst{0x33, 0x2, 0x0, 0x0, 160, 0x5} case ACLZ: return &inst{0x13, 0x1, 0x0, 0x0, 1536, 0x30} case ACLZW: diff --git a/src/cmd/internal/obj/riscv/obj.go b/src/cmd/internal/obj/riscv/obj.go index 5bab0ff419..a55c6faf65 100644 --- a/src/cmd/internal/obj/riscv/obj.go +++ b/src/cmd/internal/obj/riscv/obj.go @@ -2640,7 +2640,7 @@ var instructions = [ALAST & obj.AMask]instructionData{ AXNOR & obj.AMask: {enc: rIIIEncoding, ternary: true}, AZEXTH & obj.AMask: {enc: rIIEncoding}, - // 28.4.3: Bitwise Rotation (Zbb) + // 28.4.2: Bitwise Rotation (Zbb) AROL & obj.AMask: {enc: rIIIEncoding, ternary: true}, AROLW & obj.AMask: {enc: rIIIEncoding, ternary: true}, AROR & obj.AMask: {enc: rIIIEncoding, immForm: ARORI, ternary: true}, @@ -2650,6 +2650,11 @@ var instructions = [ALAST & obj.AMask]instructionData{ AORCB & obj.AMask: {enc: rIIEncoding}, AREV8 & obj.AMask: {enc: rIIEncoding}, + // 28.4.3: Carry-less Multiplication (Zbc) + ACLMUL & obj.AMask: {enc: rIIIEncoding, ternary: true}, + ACLMULH & obj.AMask: {enc: rIIIEncoding, ternary: true}, + ACLMULR & obj.AMask: {enc: rIIIEncoding, ternary: true}, + // 28.4.4: Single-bit Instructions (Zbs) ABCLR & obj.AMask: {enc: rIIIEncoding, immForm: ABCLRI, ternary: true}, ABCLRI & obj.AMask: {enc: iIIEncoding, ternary: true}, |