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authorisharipo <iskander.sharipov@intel.com>2018-05-16 02:21:59 +0300
committerIlya Tocar <ilya.tocar@intel.com>2018-05-22 14:57:15 +0000
commit5437cde96cd4228c3b3405cd138b410ffa5523c2 (patch)
tree09b96648b2beaf11943944c712c9da512679a90e /src/cmd/internal/obj/util.go
parent8a85bce215eda0fa56bf67186d0fd487954185f2 (diff)
downloadgo-5437cde96cd4228c3b3405cd138b410ffa5523c2.tar.xz
cmd/asm: enable AVX512
- Uncomment tests for AVX512 encoder - Permit instruction suffixes for x86 - Permit limited reg list [reg-reg] syntax for x86 for multi-source ops - EVEX encoding support in obj/x86 (Z-cases, asmevex, etc.) - optabs and ytabs generated by x86avxgen (https://golang.org/cl/107216) Note: suffix formatting implemented with updated CConv function. Now arch asm backend should register formatting function by calling RegisterOpSuffix. Updates #22779 Change-Id: I076a167ee49582700e058c56ad74e6696710c8c8 Reviewed-on: https://go-review.googlesource.com/113315 Run-TryBot: Iskander Sharipov <iskander.sharipov@intel.com> TryBot-Result: Gobot Gobot <gobot@golang.org> Reviewed-by: Cherry Zhang <cherryyz@google.com>
Diffstat (limited to 'src/cmd/internal/obj/util.go')
-rw-r--r--src/cmd/internal/obj/util.go45
1 files changed, 44 insertions, 1 deletions
diff --git a/src/cmd/internal/obj/util.go b/src/cmd/internal/obj/util.go
index 98475d00ca..3453b71b3b 100644
--- a/src/cmd/internal/obj/util.go
+++ b/src/cmd/internal/obj/util.go
@@ -72,11 +72,26 @@ const (
C_SCOND_XOR = 14
)
-// CConv formats ARM condition codes.
+// CConv formats opcode suffix bits (Prog.Scond).
func CConv(s uint8) string {
if s == 0 {
return ""
}
+ for i := range opSuffixSpace {
+ sset := &opSuffixSpace[i]
+ if sset.arch == objabi.GOARCH {
+ return sset.cconv(s)
+ }
+ }
+ return fmt.Sprintf("SC???%d", s)
+}
+
+// CConvARM formats ARM opcode suffix bits (mostly condition codes).
+func CConvARM(s uint8) string {
+ // TODO: could be great to move suffix-related things into
+ // ARM asm backends some day.
+ // obj/x86 can be used as an example.
+
sc := armCondCode[(s&C_SCOND)^C_SCOND_XOR]
if s&C_SBIT != 0 {
sc += ".S"
@@ -368,6 +383,30 @@ func offConv(off int64) string {
return fmt.Sprintf("%+d", off)
}
+// opSuffixSet is like regListSet, but for opcode suffixes.
+//
+// Unlike some other similar structures, uint8 space is not
+// divided by it's own values set (because the're only 256 of them).
+// Instead, every arch may interpret/format all 8 bits as they like,
+// as long as they register proper cconv function for it.
+type opSuffixSet struct {
+ arch string
+ cconv func(suffix uint8) string
+}
+
+var opSuffixSpace []opSuffixSet
+
+// RegisterOpSuffix assigns cconv function for formatting opcode suffixes
+// when compiling for GOARCH=arch.
+//
+// cconv is never called with 0 argument.
+func RegisterOpSuffix(arch string, cconv func(uint8) string) {
+ opSuffixSpace = append(opSuffixSpace, opSuffixSet{
+ arch: arch,
+ cconv: cconv,
+ })
+}
+
type regSet struct {
lo int
hi int
@@ -434,6 +473,10 @@ const (
// arm64 uses the 60th bit to differentiate from other archs
RegListARM64Lo = 1 << 60
RegListARM64Hi = 1<<61 - 1
+
+ // x86 uses the 61th bit to differentiate from other archs
+ RegListX86Lo = 1 << 61
+ RegListX86Hi = 1<<62 - 1
)
// RegisterRegisterList binds a pretty-printer (RLconv) for register list