diff options
| author | Ben Shi <powerman1st@163.com> | 2017-06-20 03:03:12 +0000 |
|---|---|---|
| committer | Cherry Zhang <cherryyz@google.com> | 2017-06-30 19:09:44 +0000 |
| commit | ef26021d30ffb7edf8d1da5a3155e66d6e845a94 (patch) | |
| tree | 2bf5faf8984554396920889cab3a9063fc71013f /src/cmd/internal/obj/arm | |
| parent | 4b8bfa6352e8f67886dc1cd1eba92b248715bd11 (diff) | |
| download | go-ef26021d30ffb7edf8d1da5a3155e66d6e845a94.tar.xz | |
cmd/internal/obj/arm: check illegal base registers in ARM instructions
Wrong instructions "MOVW 8(F0), R1" and "MOVW R0<<0(F1), R1"
are silently accepted, and all Fx are treated as Rx.
The patch checks all those illegal base registers.
fixes #20724
Change-Id: I05d41bb43fe774b023205163b7daf4a846e9dc88
Reviewed-on: https://go-review.googlesource.com/46132
Run-TryBot: Cherry Zhang <cherryyz@google.com>
TryBot-Result: Gobot Gobot <gobot@golang.org>
Reviewed-by: Cherry Zhang <cherryyz@google.com>
Diffstat (limited to 'src/cmd/internal/obj/arm')
| -rw-r--r-- | src/cmd/internal/obj/arm/asm5.go | 21 |
1 files changed, 21 insertions, 0 deletions
diff --git a/src/cmd/internal/obj/arm/asm5.go b/src/cmd/internal/obj/arm/asm5.go index 0836a7fa4e..cfda99f602 100644 --- a/src/cmd/internal/obj/arm/asm5.go +++ b/src/cmd/internal/obj/arm/asm5.go @@ -1343,6 +1343,27 @@ func (c *ctxt5) oplook(p *obj.Prog) *Optab { } } + // check illegal base register + switch a1 { + case C_SHIFT: + if p.From.Reg == 0 { // no base register + break + } + fallthrough + case C_SOREG, C_LOREG, C_HOREG, C_FOREG, C_ROREG, C_HFOREG, C_SROREG: + if p.From.Reg < REG_R0 || REG_R15 < p.From.Reg { + c.ctxt.Diag("illegal base register: %v", p) + } + default: + } + switch a3 { + case C_SOREG, C_LOREG, C_HOREG, C_FOREG, C_ROREG, C_HFOREG, C_SROREG, C_SHIFT: + if p.To.Reg < REG_R0 || REG_R15 < p.To.Reg { + c.ctxt.Diag("illegal base register: %v", p) + } + default: + } + // If current instruction has a .S suffix (flags update), // we must use the constant pool instead of splitting it. if (a1 == C_RCON2A || a1 == C_RCON2S) && p.Scond&C_SBIT != 0 { |