diff options
| author | Junyang Shao <shaojunyang@google.com> | 2026-04-07 22:03:43 +0000 |
|---|---|---|
| committer | Junyang Shao <shaojunyang@google.com> | 2026-04-13 13:36:18 -0700 |
| commit | 1aa9d9a69bbf1c9bf1a5806d554ab932c587efd0 (patch) | |
| tree | 270eed8e15c18da01cab2514c346d1d013410895 /src/cmd/internal/obj/arm64/list7.go | |
| parent | 42083b1ea08c03e298b1e003c6e477b4757a130c (diff) | |
| download | go-1aa9d9a69bbf1c9bf1a5806d554ab932c587efd0.tar.xz | |
cmd/asm, cmd/internal/obj/arm64: support SVE register lists
This CL adds the register list support for SVE:
[Z1.B, Z2.B]
[P1.B, P2.B]
[Z1.D]
[Z1.D, Z2.D, Z3.D]
[Z1.D, Z2.D, Z3.D, Z4.D]
This CL is generated by CL 763780.
Change-Id: I92210097a8a7525a5a53a2dce0b7652397275dd6
Reviewed-on: https://go-review.googlesource.com/c/go/+/763820
Reviewed-by: David Chase <drchase@google.com>
LUCI-TryBot-Result: golang-scoped@luci-project-accounts.iam.gserviceaccount.com <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
Diffstat (limited to 'src/cmd/internal/obj/arm64/list7.go')
| -rw-r--r-- | src/cmd/internal/obj/arm64/list7.go | 33 |
1 files changed, 30 insertions, 3 deletions
diff --git a/src/cmd/internal/obj/arm64/list7.go b/src/cmd/internal/obj/arm64/list7.go index 3ce949f465..b33bf690bf 100644 --- a/src/cmd/internal/obj/arm64/list7.go +++ b/src/cmd/internal/obj/arm64/list7.go @@ -229,11 +229,18 @@ func SPCconv(a int64) string { func rlconv(list int64) string { str := "" - // ARM64 register list follows ARM64 instruction decode schema + // For SIMD&FP register list in ARM64, the conv + // follows the ARM64 instruction decode schema // | 31 | 30 | ... | 15 - 12 | 11 - 10 | ... | // +----+----+-----+---------+---------+-----+ // | | Q | ... | opcode | size | ... | + // For Scalable Vector register lists, the conv + // follows: + // | 33 - 32 | 31 - 30 | ... | 15 - 12 | 11 - 10 | ... | 5 - 0 | + // +----+----+----+----+-----+---------+---------+-----+-------+ + // |regprefix| class 1 | ... | reg cnt | class 2 | ... | reg | + firstReg := int(list & 31) opcode := (list >> 12) & 15 var regCnt int @@ -251,7 +258,17 @@ func rlconv(list int64) string { regCnt = -1 } // Q:size - arng := ((list>>30)&1)<<2 | (list>>10)&3 + var regPrefix string + regType := (list >> 32) & 3 + switch regType { + case 0: + regPrefix = "V" + case 1: + regPrefix = "Z" + case 2: + regPrefix = "P" + } + arng := ((list>>30)&3)<<2 | (list>>10)&3 switch arng { case 0: t = "B8" @@ -269,6 +286,16 @@ func rlconv(list int64) string { t = "D1" case 7: t = "D2" + case 9: + t = "B" + case 10: + t = "H" + case 11: + t = "S" + case 13: + t = "D" + case 14: + t = "Q" } for i := 0; i < regCnt; i++ { if str == "" { @@ -276,7 +303,7 @@ func rlconv(list int64) string { } else { str += "," } - str += fmt.Sprintf("V%d.", (firstReg+i)&31) + str += fmt.Sprintf("%s%d.", regPrefix, (firstReg+i)&31) str += t } str += "]" |