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| author | Alexander Musman <alexander.musman@gmail.com> | 2025-11-18 16:59:53 +0300 |
|---|---|---|
| committer | Gopher Robot <gobot@golang.org> | 2026-04-08 03:51:27 -0700 |
| commit | 4dffc57944c829d2fb2cf1b25168c27e555a8e5c (patch) | |
| tree | c9993f427c2f1ce6b60974ef1e7111388838398b /src/cmd/internal/obj/arm64/a.out.go | |
| parent | f91403c2a0fd3fc4367d901bd6f238948c49c265 (diff) | |
| download | go-4dffc57944c829d2fb2cf1b25168c27e555a8e5c.tar.xz | |
cmd/internal/obj/arm64: add remaining ASIMD compare instructions
Add remaining arm64 ASIMD vector compare instructions.
All these instructions produce either all zeroes (false) or all ones (true)
bits in each corresponding lane as the result.
Added integer comparison instructions:
- VCMEQ (compare to zero)
- VCMGE, VCMGT (singed, both two-register and compare to zero)
- VCMHI, VCMHS (unsigned two-register compare)
- VCMLE, VCMLT (signed compare to zero)
Added floating-point comparison instructions:
- VFCMEQ, VFCMGE, VFCMGT (both two-register and zero variants)
- VFCMLE, VFCMLT (compare to zero)
Change-Id: I913165d3934f2556c9bdf38c5103ef56d86383ef
Reviewed-on: https://go-review.googlesource.com/c/go/+/721640
Auto-Submit: Keith Randall <khr@golang.org>
LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
Reviewed-by: Dmitri Shuralyov <dmitshur@google.com>
Reviewed-by: Keith Randall <khr@golang.org>
Reviewed-by: Keith Randall <khr@google.com>
Diffstat (limited to 'src/cmd/internal/obj/arm64/a.out.go')
| -rw-r--r-- | src/cmd/internal/obj/arm64/a.out.go | 11 |
1 files changed, 11 insertions, 0 deletions
diff --git a/src/cmd/internal/obj/arm64/a.out.go b/src/cmd/internal/obj/arm64/a.out.go index 3a39f2719d..fdc42eabaa 100644 --- a/src/cmd/internal/obj/arm64/a.out.go +++ b/src/cmd/internal/obj/arm64/a.out.go @@ -1120,6 +1120,12 @@ const ( AVBIT AVBSL AVCMEQ + AVCMGE + AVCMGT + AVCMHI + AVCMHS + AVCMLE + AVCMLT AVCMTST AVCNT AVDUP @@ -1128,6 +1134,11 @@ const ( AVEXT AVFMLA AVFMLS + AVFCMEQ + AVFCMGE + AVFCMGT + AVFCMLE + AVFCMLT AVLD1 AVLD1R AVLD2 |