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authorJunyang Shao <shaojunyang@google.com>2025-10-16 16:07:32 +0000
committerJunyang Shao <shaojunyang@google.com>2025-10-24 10:53:28 -0700
commitcf7c1a4cbb917b6c5d80d1d9443a40cb7720db75 (patch)
treea1e74fb930fae0c22ad03c377c5bc4f4585ad6e0 /src/cmd/compile
parent2b8eded4f4fd3d421d1fb9af68c774142abcf208 (diff)
downloadgo-cf7c1a4cbb917b6c5d80d1d9443a40cb7720db75.tar.xz
[dev.simd] cmd/compile, simd: add SHA features
This CL also fixed some bugs left in CL 712181. Change-Id: I9cb6cd9fbaef307f352809bf21b8fec3eb62721a Reviewed-on: https://go-review.googlesource.com/c/go/+/712361 Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
Diffstat (limited to 'src/cmd/compile')
-rw-r--r--src/cmd/compile/internal/amd64/simdssa.go12
-rw-r--r--src/cmd/compile/internal/amd64/ssa.go26
-rw-r--r--src/cmd/compile/internal/ssa/_gen/AMD64Ops.go28
-rw-r--r--src/cmd/compile/internal/ssa/_gen/simdAMD64.rules14
-rw-r--r--src/cmd/compile/internal/ssa/_gen/simdAMD64ops.go8
-rw-r--r--src/cmd/compile/internal/ssa/_gen/simdgenericOps.go14
-rw-r--r--src/cmd/compile/internal/ssa/opGen.go588
-rw-r--r--src/cmd/compile/internal/ssa/rewriteAMD64.go42
-rw-r--r--src/cmd/compile/internal/ssagen/intrinsics.go13
-rw-r--r--src/cmd/compile/internal/ssagen/simdintrinsics.go14
10 files changed, 543 insertions, 216 deletions
diff --git a/src/cmd/compile/internal/amd64/simdssa.go b/src/cmd/compile/internal/amd64/simdssa.go
index 86d44c1245..d365ce8afe 100644
--- a/src/cmd/compile/internal/amd64/simdssa.go
+++ b/src/cmd/compile/internal/amd64/simdssa.go
@@ -1955,6 +1955,18 @@ func ssaGenSIMDValue(s *ssagen.State, v *ssa.Value) bool {
ssa.OpAMD64VPTERNLOGQ512load:
p = simdV31loadResultInArg0Imm8(s, v)
+ case ssa.OpAMD64SHA1MSG1128,
+ ssa.OpAMD64SHA1MSG2128,
+ ssa.OpAMD64SHA1NEXTE128,
+ ssa.OpAMD64SHA256MSG1128:
+ p = simdV21ResultInArg0(s, v)
+
+ case ssa.OpAMD64SHA1RNDS4128:
+ p = simdV21ResultInArg0Imm8(s, v)
+
+ case ssa.OpAMD64SHA256RNDS2128:
+ p = simdV31x0AtIn2ResultInArg0(s, v)
+
default:
// Unknown reg shape
return false
diff --git a/src/cmd/compile/internal/amd64/ssa.go b/src/cmd/compile/internal/amd64/ssa.go
index b3f8191609..dfc282608a 100644
--- a/src/cmd/compile/internal/amd64/ssa.go
+++ b/src/cmd/compile/internal/amd64/ssa.go
@@ -2349,6 +2349,32 @@ func simdV2kvloadImm8(s *ssagen.State, v *ssa.Value) *obj.Prog {
return p
}
+// Example instruction: SHA1NEXTE X2, X2
+func simdV21ResultInArg0(s *ssagen.State, v *ssa.Value) *obj.Prog {
+ p := s.Prog(v.Op.Asm())
+ p.From.Type = obj.TYPE_REG
+ p.From.Reg = simdReg(v.Args[1])
+ p.To.Type = obj.TYPE_REG
+ p.To.Reg = simdReg(v)
+ return p
+}
+
+// Example instruction: SHA1RNDS4 $1, X2, X2
+func simdV21ResultInArg0Imm8(s *ssagen.State, v *ssa.Value) *obj.Prog {
+ p := s.Prog(v.Op.Asm())
+ p.From.Offset = int64(v.AuxUInt8())
+ p.From.Type = obj.TYPE_CONST
+ p.AddRestSourceReg(simdReg(v.Args[1]))
+ p.To.Type = obj.TYPE_REG
+ p.To.Reg = simdReg(v)
+ return p
+}
+
+// Example instruction: SHA256RNDS2 X0, X11, X2
+func simdV31x0AtIn2ResultInArg0(s *ssagen.State, v *ssa.Value) *obj.Prog {
+ return simdV31ResultInArg0(s, v)
+}
+
var blockJump = [...]struct {
asm, invasm obj.As
}{
diff --git a/src/cmd/compile/internal/ssa/_gen/AMD64Ops.go b/src/cmd/compile/internal/ssa/_gen/AMD64Ops.go
index c92f1b8531..dcf452f183 100644
--- a/src/cmd/compile/internal/ssa/_gen/AMD64Ops.go
+++ b/src/cmd/compile/internal/ssa/_gen/AMD64Ops.go
@@ -135,6 +135,7 @@ func init() {
vz = v | x15
wz = w | x15
+ x0 = buildReg("X0")
)
// Common slices of register masks
var (
@@ -213,7 +214,7 @@ func init() {
vstorek = regInfo{inputs: []regMask{gpspsb, mask, v, 0}}
v11 = regInfo{inputs: vzonly, outputs: vonly}
- v21 = regInfo{inputs: []regMask{vz, vz}, outputs: vonly}
+ v21 = regInfo{inputs: []regMask{v, vz}, outputs: vonly} // used in resultInArg0 ops, arg0 must not be x15
vk = regInfo{inputs: vzonly, outputs: maskonly}
kv = regInfo{inputs: maskonly, outputs: vonly}
v2k = regInfo{inputs: []regMask{vz, vz}, outputs: maskonly}
@@ -247,17 +248,18 @@ func init() {
// These register masks are used by SIMD only, they follow the pattern:
// Mem last, k mask second to last (if any), address right before mem and k mask.
- wkwload = regInfo{inputs: []regMask{gpspsb, mask, 0}, outputs: wonly}
- v21load = regInfo{inputs: []regMask{vz, gpspsb, 0}, outputs: vonly}
- v31load = regInfo{inputs: []regMask{v, vz, gpspsb, 0}, outputs: vonly} // used in resultInArg0 ops, arg0 must not be x15
- v11load = regInfo{inputs: []regMask{gpspsb, 0}, outputs: vonly}
- w21load = regInfo{inputs: []regMask{wz, gpspsb, 0}, outputs: wonly}
- w31load = regInfo{inputs: []regMask{w, wz, gpspsb, 0}, outputs: wonly} // used in resultInArg0 ops, arg0 must not be x15
- w2kload = regInfo{inputs: []regMask{wz, gpspsb, 0}, outputs: maskonly}
- w2kwload = regInfo{inputs: []regMask{wz, gpspsb, mask, 0}, outputs: wonly}
- w11load = regInfo{inputs: []regMask{gpspsb, 0}, outputs: wonly}
- w3kwload = regInfo{inputs: []regMask{w, wz, gpspsb, mask, 0}, outputs: wonly} // used in resultInArg0 ops, arg0 must not be x15
- w2kkload = regInfo{inputs: []regMask{wz, gpspsb, mask, 0}, outputs: maskonly}
+ wkwload = regInfo{inputs: []regMask{gpspsb, mask, 0}, outputs: wonly}
+ v21load = regInfo{inputs: []regMask{v, gpspsb, 0}, outputs: vonly} // used in resultInArg0 ops, arg0 must not be x15
+ v31load = regInfo{inputs: []regMask{v, vz, gpspsb, 0}, outputs: vonly} // used in resultInArg0 ops, arg0 must not be x15
+ v11load = regInfo{inputs: []regMask{gpspsb, 0}, outputs: vonly}
+ w21load = regInfo{inputs: []regMask{wz, gpspsb, 0}, outputs: wonly}
+ w31load = regInfo{inputs: []regMask{w, wz, gpspsb, 0}, outputs: wonly} // used in resultInArg0 ops, arg0 must not be x15
+ w2kload = regInfo{inputs: []regMask{wz, gpspsb, 0}, outputs: maskonly}
+ w2kwload = regInfo{inputs: []regMask{wz, gpspsb, mask, 0}, outputs: wonly}
+ w11load = regInfo{inputs: []regMask{gpspsb, 0}, outputs: wonly}
+ w3kwload = regInfo{inputs: []regMask{w, wz, gpspsb, mask, 0}, outputs: wonly} // used in resultInArg0 ops, arg0 must not be x15
+ w2kkload = regInfo{inputs: []regMask{wz, gpspsb, mask, 0}, outputs: maskonly}
+ v31x0AtIn2 = regInfo{inputs: []regMask{v, vz, x0}, outputs: vonly} // used in resultInArg0 ops, arg0 must not be x15
kload = regInfo{inputs: []regMask{gpspsb, 0}, outputs: maskonly}
kstore = regInfo{inputs: []regMask{gpspsb, mask, 0}}
@@ -1477,7 +1479,7 @@ func init() {
genSIMDfile: "../../amd64/simdssa.go",
ops: append(AMD64ops, simdAMD64Ops(v11, v21, v2k, vkv, v2kv, v2kk, v31, v3kv, vgpv, vgp, vfpv, vfpkv,
w11, w21, w2k, wkw, w2kw, w2kk, w31, w3kw, wgpw, wgp, wfpw, wfpkw, wkwload, v21load, v31load, v11load,
- w21load, w31load, w2kload, w2kwload, w11load, w3kwload, w2kkload)...), // AMD64ops,
+ w21load, w31load, w2kload, w2kwload, w11load, w3kwload, w2kkload, v31x0AtIn2)...), // AMD64ops,
blocks: AMD64blocks,
regnames: regNamesAMD64,
ParamIntRegNames: "AX BX CX DI SI R8 R9 R10 R11",
diff --git a/src/cmd/compile/internal/ssa/_gen/simdAMD64.rules b/src/cmd/compile/internal/ssa/_gen/simdAMD64.rules
index 2cda679f2d..1fc569017b 100644
--- a/src/cmd/compile/internal/ssa/_gen/simdAMD64.rules
+++ b/src/cmd/compile/internal/ssa/_gen/simdAMD64.rules
@@ -939,6 +939,20 @@
(RoundToEvenScaledResidueFloat64x2 [a] x) => (VREDUCEPD128 [a+0] x)
(RoundToEvenScaledResidueFloat64x4 [a] x) => (VREDUCEPD256 [a+0] x)
(RoundToEvenScaledResidueFloat64x8 [a] x) => (VREDUCEPD512 [a+0] x)
+(SHA1Msg1Int32x4 ...) => (SHA1MSG1128 ...)
+(SHA1Msg1Uint32x4 ...) => (SHA1MSG1128 ...)
+(SHA1Msg2Int32x4 ...) => (SHA1MSG2128 ...)
+(SHA1Msg2Uint32x4 ...) => (SHA1MSG2128 ...)
+(SHA1NextEInt32x4 ...) => (SHA1NEXTE128 ...)
+(SHA1NextEUint32x4 ...) => (SHA1NEXTE128 ...)
+(SHA1Round4Int32x4 ...) => (SHA1RNDS4128 ...)
+(SHA1Round4Uint32x4 ...) => (SHA1RNDS4128 ...)
+(SHA256Msg1Int32x4 ...) => (SHA256MSG1128 ...)
+(SHA256Msg1Uint32x4 ...) => (SHA256MSG1128 ...)
+(SHA256Msg2Int32x4 ...) => (SHA256MSG1128 ...)
+(SHA256Msg2Uint32x4 ...) => (SHA256MSG1128 ...)
+(SHA256Rounds2Int32x4 ...) => (SHA256RNDS2128 ...)
+(SHA256Rounds2Uint32x4 ...) => (SHA256RNDS2128 ...)
(ScaleFloat32x4 ...) => (VSCALEFPS128 ...)
(ScaleFloat32x8 ...) => (VSCALEFPS256 ...)
(ScaleFloat32x16 ...) => (VSCALEFPS512 ...)
diff --git a/src/cmd/compile/internal/ssa/_gen/simdAMD64ops.go b/src/cmd/compile/internal/ssa/_gen/simdAMD64ops.go
index add281c6b9..0ee4f33fbf 100644
--- a/src/cmd/compile/internal/ssa/_gen/simdAMD64ops.go
+++ b/src/cmd/compile/internal/ssa/_gen/simdAMD64ops.go
@@ -3,8 +3,13 @@
package main
func simdAMD64Ops(v11, v21, v2k, vkv, v2kv, v2kk, v31, v3kv, vgpv, vgp, vfpv, vfpkv, w11, w21, w2k, wkw, w2kw, w2kk, w31, w3kw, wgpw, wgp, wfpw, wfpkw,
- wkwload, v21load, v31load, v11load, w21load, w31load, w2kload, w2kwload, w11load, w3kwload, w2kkload regInfo) []opData {
+ wkwload, v21load, v31load, v11load, w21load, w31load, w2kload, w2kwload, w11load, w3kwload, w2kkload, v31x0AtIn2 regInfo) []opData {
return []opData{
+ {name: "SHA1MSG1128", argLength: 2, reg: v21, asm: "SHA1MSG1", commutative: false, typ: "Vec128", resultInArg0: true},
+ {name: "SHA1MSG2128", argLength: 2, reg: v21, asm: "SHA1MSG2", commutative: false, typ: "Vec128", resultInArg0: true},
+ {name: "SHA1NEXTE128", argLength: 2, reg: v21, asm: "SHA1NEXTE", commutative: false, typ: "Vec128", resultInArg0: true},
+ {name: "SHA256MSG1128", argLength: 2, reg: v21, asm: "SHA256MSG1", commutative: false, typ: "Vec128", resultInArg0: true},
+ {name: "SHA256RNDS2128", argLength: 3, reg: v31x0AtIn2, asm: "SHA256RNDS2", commutative: false, typ: "Vec128", resultInArg0: true},
{name: "VADDPD128", argLength: 2, reg: v21, asm: "VADDPD", commutative: true, typ: "Vec128", resultInArg0: false},
{name: "VADDPD256", argLength: 2, reg: v21, asm: "VADDPD", commutative: true, typ: "Vec256", resultInArg0: false},
{name: "VADDPD512", argLength: 2, reg: w21, asm: "VADDPD", commutative: true, typ: "Vec512", resultInArg0: false},
@@ -1216,6 +1221,7 @@ func simdAMD64Ops(v11, v21, v2k, vkv, v2kv, v2kk, v31, v3kv, vgpv, vgp, vfpv, vf
{name: "VPRORQMasked128", argLength: 2, reg: wkw, asm: "VPRORQ", aux: "UInt8", commutative: false, typ: "Vec128", resultInArg0: false},
{name: "VPRORQMasked256", argLength: 2, reg: wkw, asm: "VPRORQ", aux: "UInt8", commutative: false, typ: "Vec256", resultInArg0: false},
{name: "VPRORQMasked512", argLength: 2, reg: wkw, asm: "VPRORQ", aux: "UInt8", commutative: false, typ: "Vec512", resultInArg0: false},
+ {name: "SHA1RNDS4128", argLength: 2, reg: v21, asm: "SHA1RNDS4", aux: "UInt8", commutative: false, typ: "Vec128", resultInArg0: true},
{name: "VPERM2F128256", argLength: 2, reg: v21, asm: "VPERM2F128", aux: "UInt8", commutative: false, typ: "Vec256", resultInArg0: false},
{name: "VPERM2I128256", argLength: 2, reg: v21, asm: "VPERM2I128", aux: "UInt8", commutative: false, typ: "Vec256", resultInArg0: false},
{name: "VPINSRD128", argLength: 2, reg: vgpv, asm: "VPINSRD", aux: "UInt8", commutative: false, typ: "Vec128", resultInArg0: false},
diff --git a/src/cmd/compile/internal/ssa/_gen/simdgenericOps.go b/src/cmd/compile/internal/ssa/_gen/simdgenericOps.go
index 546f6c0bc5..53b3984351 100644
--- a/src/cmd/compile/internal/ssa/_gen/simdgenericOps.go
+++ b/src/cmd/compile/internal/ssa/_gen/simdgenericOps.go
@@ -844,6 +844,18 @@ func simdGenericOps() []opData {
{name: "RoundToEvenFloat32x8", argLength: 1, commutative: false},
{name: "RoundToEvenFloat64x2", argLength: 1, commutative: false},
{name: "RoundToEvenFloat64x4", argLength: 1, commutative: false},
+ {name: "SHA1Msg1Int32x4", argLength: 2, commutative: false},
+ {name: "SHA1Msg1Uint32x4", argLength: 2, commutative: false},
+ {name: "SHA1Msg2Int32x4", argLength: 2, commutative: false},
+ {name: "SHA1Msg2Uint32x4", argLength: 2, commutative: false},
+ {name: "SHA1NextEInt32x4", argLength: 2, commutative: false},
+ {name: "SHA1NextEUint32x4", argLength: 2, commutative: false},
+ {name: "SHA256Msg1Int32x4", argLength: 2, commutative: false},
+ {name: "SHA256Msg1Uint32x4", argLength: 2, commutative: false},
+ {name: "SHA256Msg2Int32x4", argLength: 2, commutative: false},
+ {name: "SHA256Msg2Uint32x4", argLength: 2, commutative: false},
+ {name: "SHA256Rounds2Int32x4", argLength: 3, commutative: false},
+ {name: "SHA256Rounds2Uint32x4", argLength: 3, commutative: false},
{name: "ScaleFloat32x4", argLength: 2, commutative: false},
{name: "ScaleFloat32x8", argLength: 2, commutative: false},
{name: "ScaleFloat32x16", argLength: 2, commutative: false},
@@ -1206,6 +1218,8 @@ func simdGenericOps() []opData {
{name: "RoundToEvenScaledResidueFloat64x2", argLength: 1, commutative: false, aux: "UInt8"},
{name: "RoundToEvenScaledResidueFloat64x4", argLength: 1, commutative: false, aux: "UInt8"},
{name: "RoundToEvenScaledResidueFloat64x8", argLength: 1, commutative: false, aux: "UInt8"},
+ {name: "SHA1Round4Int32x4", argLength: 2, commutative: false, aux: "UInt8"},
+ {name: "SHA1Round4Uint32x4", argLength: 2, commutative: false, aux: "UInt8"},
{name: "Select128FromPairFloat32x8", argLength: 2, commutative: false, aux: "UInt8"},
{name: "Select128FromPairFloat64x4", argLength: 2, commutative: false, aux: "UInt8"},
{name: "Select128FromPairInt32x8", argLength: 2, commutative: false, aux: "UInt8"},
diff --git a/src/cmd/compile/internal/ssa/opGen.go b/src/cmd/compile/internal/ssa/opGen.go
index 9187374460..5d990224b3 100644
--- a/src/cmd/compile/internal/ssa/opGen.go
+++ b/src/cmd/compile/internal/ssa/opGen.go
@@ -1245,6 +1245,11 @@ const (
OpAMD64KMOVWi
OpAMD64KMOVBi
OpAMD64VPTEST
+ OpAMD64SHA1MSG1128
+ OpAMD64SHA1MSG2128
+ OpAMD64SHA1NEXTE128
+ OpAMD64SHA256MSG1128
+ OpAMD64SHA256RNDS2128
OpAMD64VADDPD128
OpAMD64VADDPD256
OpAMD64VADDPD512
@@ -2456,6 +2461,7 @@ const (
OpAMD64VPRORQMasked128
OpAMD64VPRORQMasked256
OpAMD64VPRORQMasked512
+ OpAMD64SHA1RNDS4128
OpAMD64VPERM2F128256
OpAMD64VPERM2I128256
OpAMD64VPINSRD128
@@ -6237,6 +6243,18 @@ const (
OpRoundToEvenFloat32x8
OpRoundToEvenFloat64x2
OpRoundToEvenFloat64x4
+ OpSHA1Msg1Int32x4
+ OpSHA1Msg1Uint32x4
+ OpSHA1Msg2Int32x4
+ OpSHA1Msg2Uint32x4
+ OpSHA1NextEInt32x4
+ OpSHA1NextEUint32x4
+ OpSHA256Msg1Int32x4
+ OpSHA256Msg1Uint32x4
+ OpSHA256Msg2Int32x4
+ OpSHA256Msg2Uint32x4
+ OpSHA256Rounds2Int32x4
+ OpSHA256Rounds2Uint32x4
OpScaleFloat32x4
OpScaleFloat32x8
OpScaleFloat32x16
@@ -6599,6 +6617,8 @@ const (
OpRoundToEvenScaledResidueFloat64x2
OpRoundToEvenScaledResidueFloat64x4
OpRoundToEvenScaledResidueFloat64x8
+ OpSHA1Round4Int32x4
+ OpSHA1Round4Uint32x4
OpSelect128FromPairFloat32x8
OpSelect128FromPairFloat64x4
OpSelect128FromPairInt32x8
@@ -19952,13 +19972,89 @@ var opcodeTable = [...]opInfo{
},
},
{
+ name: "SHA1MSG1128",
+ argLen: 2,
+ resultInArg0: true,
+ asm: x86.ASHA1MSG1,
+ reg: regInfo{
+ inputs: []inputInfo{
+ {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
+ {1, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+ },
+ outputs: []outputInfo{
+ {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
+ },
+ },
+ },
+ {
+ name: "SHA1MSG2128",
+ argLen: 2,
+ resultInArg0: true,
+ asm: x86.ASHA1MSG2,
+ reg: regInfo{
+ inputs: []inputInfo{
+ {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
+ {1, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+ },
+ outputs: []outputInfo{
+ {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
+ },
+ },
+ },
+ {
+ name: "SHA1NEXTE128",
+ argLen: 2,
+ resultInArg0: true,
+ asm: x86.ASHA1NEXTE,
+ reg: regInfo{
+ inputs: []inputInfo{
+ {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
+ {1, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+ },
+ outputs: []outputInfo{
+ {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
+ },
+ },
+ },
+ {
+ name: "SHA256MSG1128",
+ argLen: 2,
+ resultInArg0: true,
+ asm: x86.ASHA256MSG1,
+ reg: regInfo{
+ inputs: []inputInfo{
+ {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
+ {1, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+ },
+ outputs: []outputInfo{
+ {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
+ },
+ },
+ },
+ {
+ name: "SHA256RNDS2128",
+ argLen: 3,
+ resultInArg0: true,
+ asm: x86.ASHA256RNDS2,
+ reg: regInfo{
+ inputs: []inputInfo{
+ {2, 65536}, // X0
+ {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
+ {1, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+ },
+ outputs: []outputInfo{
+ {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
+ },
+ },
+ },
+ {
name: "VADDPD128",
argLen: 2,
commutative: true,
asm: x86.AVADDPD,
reg: regInfo{
inputs: []inputInfo{
- {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+ {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
{1, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
},
outputs: []outputInfo{
@@ -19973,7 +20069,7 @@ var opcodeTable = [...]opInfo{
asm: x86.AVADDPD,
reg: regInfo{
inputs: []inputInfo{
- {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+ {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
{1, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
},
outputs: []outputInfo{
@@ -20051,7 +20147,7 @@ var opcodeTable = [...]opInfo{
asm: x86.AVADDPS,
reg: regInfo{
inputs: []inputInfo{
- {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+ {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
{1, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
},
outputs: []outputInfo{
@@ -20066,7 +20162,7 @@ var opcodeTable = [...]opInfo{
asm: x86.AVADDPS,
reg: regInfo{
inputs: []inputInfo{
- {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+ {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
{1, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
},
outputs: []outputInfo{
@@ -20143,7 +20239,7 @@ var opcodeTable = [...]opInfo{
asm: x86.AVADDSUBPD,
reg: regInfo{
inputs: []inputInfo{
- {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+ {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
{1, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
},
outputs: []outputInfo{
@@ -20157,7 +20253,7 @@ var opcodeTable = [...]opInfo{
asm: x86.AVADDSUBPD,
reg: regInfo{
inputs: []inputInfo{
- {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+ {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
{1, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
},
outputs: []outputInfo{
@@ -20171,7 +20267,7 @@ var opcodeTable = [...]opInfo{
asm: x86.AVADDSUBPS,
reg: regInfo{
inputs: []inputInfo{
- {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+ {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
{1, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
},
outputs: []outputInfo{
@@ -20185,7 +20281,7 @@ var opcodeTable = [...]opInfo{
asm: x86.AVADDSUBPS,
reg: regInfo{
inputs: []inputInfo{
- {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+ {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
{1, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
},
outputs: []outputInfo{
@@ -20199,7 +20295,7 @@ var opcodeTable = [...]opInfo{
asm: x86.AVAESDEC,
reg: regInfo{
inputs: []inputInfo{
- {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+ {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
{1, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
},
outputs: []outputInfo{
@@ -20227,7 +20323,7 @@ var opcodeTable = [...]opInfo{
asm: x86.AVAESDECLAST,
reg: regInfo{
inputs: []inputInfo{
- {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+ {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
{1, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
},
outputs: []outputInfo{
@@ -20255,7 +20351,7 @@ var opcodeTable = [...]opInfo{
asm: x86.AVAESENC,
reg: regInfo{
inputs: []inputInfo{
- {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+ {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
{1, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
},
outputs: []outputInfo{
@@ -20283,7 +20379,7 @@ var opcodeTable = [...]opInfo{
asm: x86.AVAESENCLAST,
reg: regInfo{
inputs: []inputInfo{
- {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+ {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
{1, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
},
outputs: []outputInfo{
@@ -20705,7 +20801,7 @@ var opcodeTable = [...]opInfo{
asm: x86.AVDIVPD,
reg: regInfo{
inputs: []inputInfo{
- {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+ {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
{1, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
},
outputs: []outputInfo{
@@ -20719,7 +20815,7 @@ var opcodeTable = [...]opInfo{
asm: x86.AVDIVPD,
reg: regInfo{
inputs: []inputInfo{
- {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+ {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
{1, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
},
outputs: []outputInfo{
@@ -20792,7 +20888,7 @@ var opcodeTable = [...]opInfo{
asm: x86.AVDIVPS,
reg: regInfo{
inputs: []inputInfo{
- {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+ {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
{1, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
},
outputs: []outputInfo{
@@ -20806,7 +20902,7 @@ var opcodeTable = [...]opInfo{
asm: x86.AVDIVPS,
reg: regInfo{
inputs: []inputInfo{
- {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+ {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
{1, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
},
outputs: []outputInfo{
@@ -21644,7 +21740,7 @@ var opcodeTable = [...]opInfo{
asm: x86.AVHADDPD,
reg: regInfo{
inputs: []inputInfo{
- {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+ {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
{1, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
},
outputs: []outputInfo{
@@ -21658,7 +21754,7 @@ var opcodeTable = [...]opInfo{
asm: x86.AVHADDPD,
reg: regInfo{
inputs: []inputInfo{
- {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+ {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
{1, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
},
outputs: []outputInfo{
@@ -21672,7 +21768,7 @@ var opcodeTable = [...]opInfo{
asm: x86.AVHADDPS,
reg: regInfo{
inputs: []inputInfo{
- {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+ {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
{1, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
},
outputs: []outputInfo{
@@ -21686,7 +21782,7 @@ var opcodeTable = [...]opInfo{
asm: x86.AVHADDPS,
reg: regInfo{
inputs: []inputInfo{
- {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+ {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
{1, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
},
outputs: []outputInfo{
@@ -21700,7 +21796,7 @@ var opcodeTable = [...]opInfo{
asm: x86.AVHSUBPD,
reg: regInfo{
inputs: []inputInfo{
- {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+ {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
{1, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
},
outputs: []outputInfo{
@@ -21714,7 +21810,7 @@ var opcodeTable = [...]opInfo{
asm: x86.AVHSUBPD,
reg: regInfo{
inputs: []inputInfo{
- {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+ {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
{1, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
},
outputs: []outputInfo{
@@ -21728,7 +21824,7 @@ var opcodeTable = [...]opInfo{
asm: x86.AVHSUBPS,
reg: regInfo{
inputs: []inputInfo{
- {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+ {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
{1, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
},
outputs: []outputInfo{
@@ -21742,7 +21838,7 @@ var opcodeTable = [...]opInfo{
asm: x86.AVHSUBPS,
reg: regInfo{
inputs: []inputInfo{
- {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+ {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
{1, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
},
outputs: []outputInfo{
@@ -21757,7 +21853,7 @@ var opcodeTable = [...]opInfo{
asm: x86.AVMAXPD,
reg: regInfo{
inputs: []inputInfo{
- {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+ {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
{1, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
},
outputs: []outputInfo{
@@ -21772,7 +21868,7 @@ var opcodeTable = [...]opInfo{
asm: x86.AVMAXPD,
reg: regInfo{
inputs: []inputInfo{
- {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+ {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
{1, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
},
outputs: []outputInfo{
@@ -21850,7 +21946,7 @@ var opcodeTable = [...]opInfo{
asm: x86.AVMAXPS,
reg: regInfo{
inputs: []inputInfo{
- {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+ {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
{1, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
},
outputs: []outputInfo{
@@ -21865,7 +21961,7 @@ var opcodeTable = [...]opInfo{
asm: x86.AVMAXPS,
reg: regInfo{
inputs: []inputInfo{
- {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+ {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
{1, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
},
outputs: []outputInfo{
@@ -21943,7 +22039,7 @@ var opcodeTable = [...]opInfo{
asm: x86.AVMINPD,
reg: regInfo{
inputs: []inputInfo{
- {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+ {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
{1, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
},
outputs: []outputInfo{
@@ -21958,7 +22054,7 @@ var opcodeTable = [...]opInfo{
asm: x86.AVMINPD,
reg: regInfo{
inputs: []inputInfo{
- {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+ {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
{1, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
},
outputs: []outputInfo{
@@ -22036,7 +22132,7 @@ var opcodeTable = [...]opInfo{
asm: x86.AVMINPS,
reg: regInfo{
inputs: []inputInfo{
- {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+ {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
{1, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
},
outputs: []outputInfo{
@@ -22051,7 +22147,7 @@ var opcodeTable = [...]opInfo{
asm: x86.AVMINPS,
reg: regInfo{
inputs: []inputInfo{
- {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+ {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
{1, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
},
outputs: []outputInfo{
@@ -22213,7 +22309,7 @@ var opcodeTable = [...]opInfo{
asm: x86.AVMULPD,
reg: regInfo{
inputs: []inputInfo{
- {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+ {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
{1, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
},
outputs: []outputInfo{
@@ -22228,7 +22324,7 @@ var opcodeTable = [...]opInfo{
asm: x86.AVMULPD,
reg: regInfo{
inputs: []inputInfo{
- {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+ {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
{1, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
},
outputs: []outputInfo{
@@ -22306,7 +22402,7 @@ var opcodeTable = [...]opInfo{
asm: x86.AVMULPS,
reg: regInfo{
inputs: []inputInfo{
- {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+ {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
{1, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
},
outputs: []outputInfo{
@@ -22321,7 +22417,7 @@ var opcodeTable = [...]opInfo{
asm: x86.AVMULPS,
reg: regInfo{
inputs: []inputInfo{
- {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+ {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
{1, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
},
outputs: []outputInfo{
@@ -22722,7 +22818,7 @@ var opcodeTable = [...]opInfo{
asm: x86.AVPACKSSDW,
reg: regInfo{
inputs: []inputInfo{
- {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+ {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
{1, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
},
outputs: []outputInfo{
@@ -22736,7 +22832,7 @@ var opcodeTable = [...]opInfo{
asm: x86.AVPACKSSDW,
reg: regInfo{
inputs: []inputInfo{
- {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+ {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
{1, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
},
outputs: []outputInfo{
@@ -22809,7 +22905,7 @@ var opcodeTable = [...]opInfo{
asm: x86.AVPACKUSDW,
reg: regInfo{
inputs: []inputInfo{
- {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+ {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
{1, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
},
outputs: []outputInfo{
@@ -22823,7 +22919,7 @@ var opcodeTable = [...]opInfo{
asm: x86.AVPACKUSDW,
reg: regInfo{
inputs: []inputInfo{
- {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+ {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
{1, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
},
outputs: []outputInfo{
@@ -22897,7 +22993,7 @@ var opcodeTable = [...]opInfo{
asm: x86.AVPADDB,
reg: regInfo{
inputs: []inputInfo{
- {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+ {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
{1, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
},
outputs: []outputInfo{
@@ -22912,7 +23008,7 @@ var opcodeTable = [...]opInfo{
asm: x86.AVPADDB,
reg: regInfo{
inputs: []inputInfo{
- {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+ {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
{1, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
},
outputs: []outputInfo{
@@ -22990,7 +23086,7 @@ var opcodeTable = [...]opInfo{
asm: x86.AVPADDD,
reg: regInfo{
inputs: []inputInfo{
- {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+ {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
{1, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
},
outputs: []outputInfo{
@@ -23005,7 +23101,7 @@ var opcodeTable = [...]opInfo{
asm: x86.AVPADDD,
reg: regInfo{
inputs: []inputInfo{
- {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+ {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
{1, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
},
outputs: []outputInfo{
@@ -23083,7 +23179,7 @@ var opcodeTable = [...]opInfo{
asm: x86.AVPADDQ,
reg: regInfo{
inputs: []inputInfo{
- {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+ {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
{1, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
},
outputs: []outputInfo{
@@ -23098,7 +23194,7 @@ var opcodeTable = [...]opInfo{
asm: x86.AVPADDQ,
reg: regInfo{
inputs: []inputInfo{
- {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+ {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
{1, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
},
outputs: []outputInfo{
@@ -23176,7 +23272,7 @@ var opcodeTable = [...]opInfo{
asm: x86.AVPADDSB,
reg: regInfo{
inputs: []inputInfo{
- {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+ {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
{1, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
},
outputs: []outputInfo{
@@ -23191,7 +23287,7 @@ var opcodeTable = [...]opInfo{
asm: x86.AVPADDSB,
reg: regInfo{
inputs: []inputInfo{
- {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+ {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
{1, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
},
outputs: []outputInfo{
@@ -23269,7 +23365,7 @@ var opcodeTable = [...]opInfo{
asm: x86.AVPADDSW,
reg: regInfo{
inputs: []inputInfo{
- {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+ {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
{1, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
},
outputs: []outputInfo{
@@ -23284,7 +23380,7 @@ var opcodeTable = [...]opInfo{
asm: x86.AVPADDSW,
reg: regInfo{
inputs: []inputInfo{
- {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+ {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
{1, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
},
outputs: []outputInfo{
@@ -23362,7 +23458,7 @@ var opcodeTable = [...]opInfo{
asm: x86.AVPADDUSB,
reg: regInfo{
inputs: []inputInfo{
- {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+ {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
{1, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
},
outputs: []outputInfo{
@@ -23377,7 +23473,7 @@ var opcodeTable = [...]opInfo{
asm: x86.AVPADDUSB,
reg: regInfo{
inputs: []inputInfo{
- {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+ {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
{1, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
},
outputs: []outputInfo{
@@ -23455,7 +23551,7 @@ var opcodeTable = [...]opInfo{
asm: x86.AVPADDUSW,
reg: regInfo{
inputs: []inputInfo{
- {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+ {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
{1, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
},
outputs: []outputInfo{
@@ -23470,7 +23566,7 @@ var opcodeTable = [...]opInfo{
asm: x86.AVPADDUSW,
reg: regInfo{
inputs: []inputInfo{
- {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+ {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
{1, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
},
outputs: []outputInfo{
@@ -23548,7 +23644,7 @@ var opcodeTable = [...]opInfo{
asm: x86.AVPADDW,
reg: regInfo{
inputs: []inputInfo{
- {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+ {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
{1, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
},
outputs: []outputInfo{
@@ -23563,7 +23659,7 @@ var opcodeTable = [...]opInfo{
asm: x86.AVPADDW,
reg: regInfo{
inputs: []inputInfo{
- {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+ {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
{1, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
},
outputs: []outputInfo{
@@ -23641,7 +23737,7 @@ var opcodeTable = [...]opInfo{
asm: x86.AVPAND,
reg: regInfo{
inputs: []inputInfo{
- {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+ {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
{1, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
},
outputs: []outputInfo{
@@ -23656,7 +23752,7 @@ var opcodeTable = [...]opInfo{
asm: x86.AVPAND,
reg: regInfo{
inputs: []inputInfo{
- {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+ {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
{1, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
},
outputs: []outputInfo{
@@ -23733,7 +23829,7 @@ var opcodeTable = [...]opInfo{
asm: x86.AVPANDN,
reg: regInfo{
inputs: []inputInfo{
- {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+ {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
{1, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
},
outputs: []outputInfo{
@@ -23747,7 +23843,7 @@ var opcodeTable = [...]opInfo{
asm: x86.AVPANDN,
reg: regInfo{
inputs: []inputInfo{
- {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+ {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
{1, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
},
outputs: []outputInfo{
@@ -23943,7 +24039,7 @@ var opcodeTable = [...]opInfo{
asm: x86.AVPAVGB,
reg: regInfo{
inputs: []inputInfo{
- {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+ {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
{1, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
},
outputs: []outputInfo{
@@ -23958,7 +24054,7 @@ var opcodeTable = [...]opInfo{
asm: x86.AVPAVGB,
reg: regInfo{
inputs: []inputInfo{
- {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+ {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
{1, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
},
outputs: []outputInfo{
@@ -24036,7 +24132,7 @@ var opcodeTable = [...]opInfo{
asm: x86.AVPAVGW,
reg: regInfo{
inputs: []inputInfo{
- {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+ {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
{1, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
},
outputs: []outputInfo{
@@ -24051,7 +24147,7 @@ var opcodeTable = [...]opInfo{
asm: x86.AVPAVGW,
reg: regInfo{
inputs: []inputInfo{
- {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+ {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
{1, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
},
outputs: []outputInfo{
@@ -24543,7 +24639,7 @@ var opcodeTable = [...]opInfo{
asm: x86.AVPCMPEQB,
reg: regInfo{
inputs: []inputInfo{
- {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+ {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
{1, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
},
outputs: []outputInfo{
@@ -24558,7 +24654,7 @@ var opcodeTable = [...]opInfo{
asm: x86.AVPCMPEQB,
reg: regInfo{
inputs: []inputInfo{
- {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+ {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
{1, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
},
outputs: []outputInfo{
@@ -24588,7 +24684,7 @@ var opcodeTable = [...]opInfo{
asm: x86.AVPCMPEQD,
reg: regInfo{
inputs: []inputInfo{
- {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+ {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
{1, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
},
outputs: []outputInfo{
@@ -24603,7 +24699,7 @@ var opcodeTable = [...]opInfo{
asm: x86.AVPCMPEQD,
reg: regInfo{
inputs: []inputInfo{
- {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+ {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
{1, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
},
outputs: []outputInfo{
@@ -24633,7 +24729,7 @@ var opcodeTable = [...]opInfo{
asm: x86.AVPCMPEQQ,
reg: regInfo{
inputs: []inputInfo{
- {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+ {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
{1, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
},
outputs: []outputInfo{
@@ -24648,7 +24744,7 @@ var opcodeTable = [...]opInfo{
asm: x86.AVPCMPEQQ,
reg: regInfo{
inputs: []inputInfo{
- {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+ {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
{1, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
},
outputs: []outputInfo{
@@ -24678,7 +24774,7 @@ var opcodeTable = [...]opInfo{
asm: x86.AVPCMPEQW,
reg: regInfo{
inputs: []inputInfo{
- {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+ {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
{1, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
},
outputs: []outputInfo{
@@ -24693,7 +24789,7 @@ var opcodeTable = [...]opInfo{
asm: x86.AVPCMPEQW,
reg: regInfo{
inputs: []inputInfo{
- {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+ {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
{1, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
},
outputs: []outputInfo{
@@ -24722,7 +24818,7 @@ var opcodeTable = [...]opInfo{
asm: x86.AVPCMPGTB,
reg: regInfo{
inputs: []inputInfo{
- {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+ {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
{1, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
},
outputs: []outputInfo{
@@ -24736,7 +24832,7 @@ var opcodeTable = [...]opInfo{
asm: x86.AVPCMPGTB,
reg: regInfo{
inputs: []inputInfo{
- {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+ {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
{1, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
},
outputs: []outputInfo{
@@ -24764,7 +24860,7 @@ var opcodeTable = [...]opInfo{
asm: x86.AVPCMPGTD,
reg: regInfo{
inputs: []inputInfo{
- {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+ {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
{1, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
},
outputs: []outputInfo{
@@ -24778,7 +24874,7 @@ var opcodeTable = [...]opInfo{
asm: x86.AVPCMPGTD,
reg: regInfo{
inputs: []inputInfo{
- {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+ {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
{1, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
},
outputs: []outputInfo{
@@ -24806,7 +24902,7 @@ var opcodeTable = [...]opInfo{
asm: x86.AVPCMPGTQ,
reg: regInfo{
inputs: []inputInfo{
- {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+ {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
{1, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
},
outputs: []outputInfo{
@@ -24820,7 +24916,7 @@ var opcodeTable = [...]opInfo{
asm: x86.AVPCMPGTQ,
reg: regInfo{
inputs: []inputInfo{
- {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+ {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
{1, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
},
outputs: []outputInfo{
@@ -24848,7 +24944,7 @@ var opcodeTable = [...]opInfo{
asm: x86.AVPCMPGTW,
reg: regInfo{
inputs: []inputInfo{
- {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+ {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
{1, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
},
outputs: []outputInfo{
@@ -24862,7 +24958,7 @@ var opcodeTable = [...]opInfo{
asm: x86.AVPCMPGTW,
reg: regInfo{
inputs: []inputInfo{
- {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+ {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
{1, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
},
outputs: []outputInfo{
@@ -25413,7 +25509,7 @@ var opcodeTable = [...]opInfo{
asm: x86.AVPERMD,
reg: regInfo{
inputs: []inputInfo{
- {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+ {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
{1, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
},
outputs: []outputInfo{
@@ -26123,7 +26219,7 @@ var opcodeTable = [...]opInfo{
asm: x86.AVPERMPS,
reg: regInfo{
inputs: []inputInfo{
- {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+ {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
{1, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
},
outputs: []outputInfo{
@@ -26494,7 +26590,7 @@ var opcodeTable = [...]opInfo{
asm: x86.AVPHADDD,
reg: regInfo{
inputs: []inputInfo{
- {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+ {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
{1, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
},
outputs: []outputInfo{
@@ -26508,7 +26604,7 @@ var opcodeTable = [...]opInfo{
asm: x86.AVPHADDD,
reg: regInfo{
inputs: []inputInfo{
- {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+ {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
{1, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
},
outputs: []outputInfo{
@@ -26522,7 +26618,7 @@ var opcodeTable = [...]opInfo{
asm: x86.AVPHADDSW,
reg: regInfo{
inputs: []inputInfo{
- {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+ {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
{1, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
},
outputs: []outputInfo{
@@ -26536,7 +26632,7 @@ var opcodeTable = [...]opInfo{
asm: x86.AVPHADDSW,
reg: regInfo{
inputs: []inputInfo{
- {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+ {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
{1, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
},
outputs: []outputInfo{
@@ -26550,7 +26646,7 @@ var opcodeTable = [...]opInfo{
asm: x86.AVPHADDW,
reg: regInfo{
inputs: []inputInfo{
- {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+ {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
{1, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
},
outputs: []outputInfo{
@@ -26564,7 +26660,7 @@ var opcodeTable = [...]opInfo{
asm: x86.AVPHADDW,
reg: regInfo{
inputs: []inputInfo{
- {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+ {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
{1, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
},
outputs: []outputInfo{
@@ -26578,7 +26674,7 @@ var opcodeTable = [...]opInfo{
asm: x86.AVPHSUBD,
reg: regInfo{
inputs: []inputInfo{
- {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+ {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
{1, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
},
outputs: []outputInfo{
@@ -26592,7 +26688,7 @@ var opcodeTable = [...]opInfo{
asm: x86.AVPHSUBD,
reg: regInfo{
inputs: []inputInfo{
- {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+ {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
{1, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
},
outputs: []outputInfo{
@@ -26606,7 +26702,7 @@ var opcodeTable = [...]opInfo{
asm: x86.AVPHSUBSW,
reg: regInfo{
inputs: []inputInfo{
- {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+ {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
{1, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
},
outputs: []outputInfo{
@@ -26620,7 +26716,7 @@ var opcodeTable = [...]opInfo{
asm: x86.AVPHSUBSW,
reg: regInfo{
inputs: []inputInfo{
- {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+ {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
{1, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
},
outputs: []outputInfo{
@@ -26634,7 +26730,7 @@ var opcodeTable = [...]opInfo{
asm: x86.AVPHSUBW,
reg: regInfo{
inputs: []inputInfo{
- {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+ {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
{1, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
},
outputs: []outputInfo{
@@ -26648,7 +26744,7 @@ var opcodeTable = [...]opInfo{
asm: x86.AVPHSUBW,
reg: regInfo{
inputs: []inputInfo{
- {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+ {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
{1, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
},
outputs: []outputInfo{
@@ -26824,7 +26920,7 @@ var opcodeTable = [...]opInfo{
asm: x86.AVPMADDUBSW,
reg: regInfo{
inputs: []inputInfo{
- {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+ {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
{1, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
},
outputs: []outputInfo{
@@ -26838,7 +26934,7 @@ var opcodeTable = [...]opInfo{
asm: x86.AVPMADDUBSW,
reg: regInfo{
inputs: []inputInfo{
- {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+ {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
{1, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
},
outputs: []outputInfo{
@@ -26911,7 +27007,7 @@ var opcodeTable = [...]opInfo{
asm: x86.AVPMADDWD,
reg: regInfo{
inputs: []inputInfo{
- {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+ {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
{1, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
},
outputs: []outputInfo{
@@ -26925,7 +27021,7 @@ var opcodeTable = [...]opInfo{
asm: x86.AVPMADDWD,
reg: regInfo{
inputs: []inputInfo{
- {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+ {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
{1, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
},
outputs: []outputInfo{
@@ -26999,7 +27095,7 @@ var opcodeTable = [...]opInfo{
asm: x86.AVPMAXSB,
reg: regInfo{
inputs: []inputInfo{
- {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+ {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
{1, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
},
outputs: []outputInfo{
@@ -27014,7 +27110,7 @@ var opcodeTable = [...]opInfo{
asm: x86.AVPMAXSB,
reg: regInfo{
inputs: []inputInfo{
- {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+ {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
{1, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
},
outputs: []outputInfo{
@@ -27092,7 +27188,7 @@ var opcodeTable = [...]opInfo{
asm: x86.AVPMAXSD,
reg: regInfo{
inputs: []inputInfo{
- {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+ {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
{1, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
},
outputs: []outputInfo{
@@ -27107,7 +27203,7 @@ var opcodeTable = [...]opInfo{
asm: x86.AVPMAXSD,
reg: regInfo{
inputs: []inputInfo{
- {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+ {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
{1, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
},
outputs: []outputInfo{
@@ -27278,7 +27374,7 @@ var opcodeTable = [...]opInfo{
asm: x86.AVPMAXSW,
reg: regInfo{
inputs: []inputInfo{
- {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+ {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
{1, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
},
outputs: []outputInfo{
@@ -27293,7 +27389,7 @@ var opcodeTable = [...]opInfo{
asm: x86.AVPMAXSW,
reg: regInfo{
inputs: []inputInfo{
- {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+ {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
{1, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
},
outputs: []outputInfo{
@@ -27371,7 +27467,7 @@ var opcodeTable = [...]opInfo{
asm: x86.AVPMAXUB,
reg: regInfo{
inputs: []inputInfo{
- {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+ {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
{1, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
},
outputs: []outputInfo{
@@ -27386,7 +27482,7 @@ var opcodeTable = [...]opInfo{
asm: x86.AVPMAXUB,
reg: regInfo{
inputs: []inputInfo{
- {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+ {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
{1, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
},
outputs: []outputInfo{
@@ -27464,7 +27560,7 @@ var opcodeTable = [...]opInfo{
asm: x86.AVPMAXUD,
reg: regInfo{
inputs: []inputInfo{
- {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+ {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
{1, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
},
outputs: []outputInfo{
@@ -27479,7 +27575,7 @@ var opcodeTable = [...]opInfo{
asm: x86.AVPMAXUD,
reg: regInfo{
inputs: []inputInfo{
- {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+ {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
{1, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
},
outputs: []outputInfo{
@@ -27650,7 +27746,7 @@ var opcodeTable = [...]opInfo{
asm: x86.AVPMAXUW,
reg: regInfo{
inputs: []inputInfo{
- {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+ {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
{1, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
},
outputs: []outputInfo{
@@ -27665,7 +27761,7 @@ var opcodeTable = [...]opInfo{
asm: x86.AVPMAXUW,
reg: regInfo{
inputs: []inputInfo{
- {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+ {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
{1, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
},
outputs: []outputInfo{
@@ -27743,7 +27839,7 @@ var opcodeTable = [...]opInfo{
asm: x86.AVPMINSB,
reg: regInfo{
inputs: []inputInfo{
- {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+ {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
{1, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
},
outputs: []outputInfo{
@@ -27758,7 +27854,7 @@ var opcodeTable = [...]opInfo{
asm: x86.AVPMINSB,
reg: regInfo{
inputs: []inputInfo{
- {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+ {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
{1, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
},
outputs: []outputInfo{
@@ -27836,7 +27932,7 @@ var opcodeTable = [...]opInfo{
asm: x86.AVPMINSD,
reg: regInfo{
inputs: []inputInfo{
- {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+ {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
{1, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
},
outputs: []outputInfo{
@@ -27851,7 +27947,7 @@ var opcodeTable = [...]opInfo{
asm: x86.AVPMINSD,
reg: regInfo{
inputs: []inputInfo{
- {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+ {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
{1, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
},
outputs: []outputInfo{
@@ -28022,7 +28118,7 @@ var opcodeTable = [...]opInfo{
asm: x86.AVPMINSW,
reg: regInfo{
inputs: []inputInfo{
- {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+ {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
{1, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
},
outputs: []outputInfo{
@@ -28037,7 +28133,7 @@ var opcodeTable = [...]opInfo{
asm: x86.AVPMINSW,
reg: regInfo{
inputs: []inputInfo{
- {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+ {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
{1, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
},
outputs: []outputInfo{
@@ -28115,7 +28211,7 @@ var opcodeTable = [...]opInfo{
asm: x86.AVPMINUB,
reg: regInfo{
inputs: []inputInfo{
- {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+ {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
{1, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
},
outputs: []outputInfo{
@@ -28130,7 +28226,7 @@ var opcodeTable = [...]opInfo{
asm: x86.AVPMINUB,
reg: regInfo{
inputs: []inputInfo{
- {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+ {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
{1, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
},
outputs: []outputInfo{
@@ -28208,7 +28304,7 @@ var opcodeTable = [...]opInfo{
asm: x86.AVPMINUD,
reg: regInfo{
inputs: []inputInfo{
- {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+ {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
{1, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
},
outputs: []outputInfo{
@@ -28223,7 +28319,7 @@ var opcodeTable = [...]opInfo{
asm: x86.AVPMINUD,
reg: regInfo{
inputs: []inputInfo{
- {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+ {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
{1, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
},
outputs: []outputInfo{
@@ -28394,7 +28490,7 @@ var opcodeTable = [...]opInfo{
asm: x86.AVPMINUW,
reg: regInfo{
inputs: []inputInfo{
- {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+ {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
{1, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
},
outputs: []outputInfo{
@@ -28409,7 +28505,7 @@ var opcodeTable = [...]opInfo{
asm: x86.AVPMINUW,
reg: regInfo{
inputs: []inputInfo{
- {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+ {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
{1, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
},
outputs: []outputInfo{
@@ -30188,7 +30284,7 @@ var opcodeTable = [...]opInfo{
asm: x86.AVPMULDQ,
reg: regInfo{
inputs: []inputInfo{
- {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+ {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
{1, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
},
outputs: []outputInfo{
@@ -30203,7 +30299,7 @@ var opcodeTable = [...]opInfo{
asm: x86.AVPMULDQ,
reg: regInfo{
inputs: []inputInfo{
- {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+ {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
{1, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
},
outputs: []outputInfo{
@@ -30218,7 +30314,7 @@ var opcodeTable = [...]opInfo{
asm: x86.AVPMULHUW,
reg: regInfo{
inputs: []inputInfo{
- {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+ {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
{1, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
},
outputs: []outputInfo{
@@ -30233,7 +30329,7 @@ var opcodeTable = [...]opInfo{
asm: x86.AVPMULHUW,
reg: regInfo{
inputs: []inputInfo{
- {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+ {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
{1, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
},
outputs: []outputInfo{
@@ -30311,7 +30407,7 @@ var opcodeTable = [...]opInfo{
asm: x86.AVPMULHW,
reg: regInfo{
inputs: []inputInfo{
- {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+ {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
{1, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
},
outputs: []outputInfo{
@@ -30326,7 +30422,7 @@ var opcodeTable = [...]opInfo{
asm: x86.AVPMULHW,
reg: regInfo{
inputs: []inputInfo{
- {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+ {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
{1, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
},
outputs: []outputInfo{
@@ -30404,7 +30500,7 @@ var opcodeTable = [...]opInfo{
asm: x86.AVPMULLD,
reg: regInfo{
inputs: []inputInfo{
- {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+ {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
{1, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
},
outputs: []outputInfo{
@@ -30419,7 +30515,7 @@ var opcodeTable = [...]opInfo{
asm: x86.AVPMULLD,
reg: regInfo{
inputs: []inputInfo{
- {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+ {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
{1, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
},
outputs: []outputInfo{
@@ -30590,7 +30686,7 @@ var opcodeTable = [...]opInfo{
asm: x86.AVPMULLW,
reg: regInfo{
inputs: []inputInfo{
- {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+ {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
{1, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
},
outputs: []outputInfo{
@@ -30605,7 +30701,7 @@ var opcodeTable = [...]opInfo{
asm: x86.AVPMULLW,
reg: regInfo{
inputs: []inputInfo{
- {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+ {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
{1, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
},
outputs: []outputInfo{
@@ -30683,7 +30779,7 @@ var opcodeTable = [...]opInfo{
asm: x86.AVPMULUDQ,
reg: regInfo{
inputs: []inputInfo{
- {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+ {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
{1, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
},
outputs: []outputInfo{
@@ -30698,7 +30794,7 @@ var opcodeTable = [...]opInfo{
asm: x86.AVPMULUDQ,
reg: regInfo{
inputs: []inputInfo{
- {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+ {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
{1, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
},
outputs: []outputInfo{
@@ -31037,7 +31133,7 @@ var opcodeTable = [...]opInfo{
asm: x86.AVPOR,
reg: regInfo{
inputs: []inputInfo{
- {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+ {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
{1, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
},
outputs: []outputInfo{
@@ -31052,7 +31148,7 @@ var opcodeTable = [...]opInfo{
asm: x86.AVPOR,
reg: regInfo{
inputs: []inputInfo{
- {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+ {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
{1, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
},
outputs: []outputInfo{
@@ -31540,7 +31636,7 @@ var opcodeTable = [...]opInfo{
asm: x86.AVPSADBW,
reg: regInfo{
inputs: []inputInfo{
- {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+ {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
{1, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
},
outputs: []outputInfo{
@@ -31554,7 +31650,7 @@ var opcodeTable = [...]opInfo{
asm: x86.AVPSADBW,
reg: regInfo{
inputs: []inputInfo{
- {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+ {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
{1, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
},
outputs: []outputInfo{
@@ -32176,7 +32272,7 @@ var opcodeTable = [...]opInfo{
asm: x86.AVPSHUFB,
reg: regInfo{
inputs: []inputInfo{
- {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+ {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
{1, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
},
outputs: []outputInfo{
@@ -32190,7 +32286,7 @@ var opcodeTable = [...]opInfo{
asm: x86.AVPSHUFB,
reg: regInfo{
inputs: []inputInfo{
- {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+ {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
{1, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
},
outputs: []outputInfo{
@@ -32263,7 +32359,7 @@ var opcodeTable = [...]opInfo{
asm: x86.AVPSIGNB,
reg: regInfo{
inputs: []inputInfo{
- {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+ {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
{1, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
},
outputs: []outputInfo{
@@ -32277,7 +32373,7 @@ var opcodeTable = [...]opInfo{
asm: x86.AVPSIGNB,
reg: regInfo{
inputs: []inputInfo{
- {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+ {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
{1, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
},
outputs: []outputInfo{
@@ -32291,7 +32387,7 @@ var opcodeTable = [...]opInfo{
asm: x86.AVPSIGND,
reg: regInfo{
inputs: []inputInfo{
- {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+ {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
{1, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
},
outputs: []outputInfo{
@@ -32305,7 +32401,7 @@ var opcodeTable = [...]opInfo{
asm: x86.AVPSIGND,
reg: regInfo{
inputs: []inputInfo{
- {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+ {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
{1, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
},
outputs: []outputInfo{
@@ -32319,7 +32415,7 @@ var opcodeTable = [...]opInfo{
asm: x86.AVPSIGNW,
reg: regInfo{
inputs: []inputInfo{
- {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+ {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
{1, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
},
outputs: []outputInfo{
@@ -32333,7 +32429,7 @@ var opcodeTable = [...]opInfo{
asm: x86.AVPSIGNW,
reg: regInfo{
inputs: []inputInfo{
- {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+ {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
{1, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
},
outputs: []outputInfo{
@@ -32521,7 +32617,7 @@ var opcodeTable = [...]opInfo{
asm: x86.AVPSLLVD,
reg: regInfo{
inputs: []inputInfo{
- {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+ {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
{1, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
},
outputs: []outputInfo{
@@ -32535,7 +32631,7 @@ var opcodeTable = [...]opInfo{
asm: x86.AVPSLLVD,
reg: regInfo{
inputs: []inputInfo{
- {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+ {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
{1, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
},
outputs: []outputInfo{
@@ -32608,7 +32704,7 @@ var opcodeTable = [...]opInfo{
asm: x86.AVPSLLVQ,
reg: regInfo{
inputs: []inputInfo{
- {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+ {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
{1, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
},
outputs: []outputInfo{
@@ -32622,7 +32718,7 @@ var opcodeTable = [...]opInfo{
asm: x86.AVPSLLVQ,
reg: regInfo{
inputs: []inputInfo{
- {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+ {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
{1, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
},
outputs: []outputInfo{
@@ -33043,7 +33139,7 @@ var opcodeTable = [...]opInfo{
asm: x86.AVPSRAVD,
reg: regInfo{
inputs: []inputInfo{
- {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+ {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
{1, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
},
outputs: []outputInfo{
@@ -33057,7 +33153,7 @@ var opcodeTable = [...]opInfo{
asm: x86.AVPSRAVD,
reg: regInfo{
inputs: []inputInfo{
- {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+ {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
{1, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
},
outputs: []outputInfo{
@@ -33565,7 +33661,7 @@ var opcodeTable = [...]opInfo{
asm: x86.AVPSRLVD,
reg: regInfo{
inputs: []inputInfo{
- {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+ {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
{1, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
},
outputs: []outputInfo{
@@ -33579,7 +33675,7 @@ var opcodeTable = [...]opInfo{
asm: x86.AVPSRLVD,
reg: regInfo{
inputs: []inputInfo{
- {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+ {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
{1, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
},
outputs: []outputInfo{
@@ -33652,7 +33748,7 @@ var opcodeTable = [...]opInfo{
asm: x86.AVPSRLVQ,
reg: regInfo{
inputs: []inputInfo{
- {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+ {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
{1, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
},
outputs: []outputInfo{
@@ -33666,7 +33762,7 @@ var opcodeTable = [...]opInfo{
asm: x86.AVPSRLVQ,
reg: regInfo{
inputs: []inputInfo{
- {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+ {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
{1, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
},
outputs: []outputInfo{
@@ -33913,7 +34009,7 @@ var opcodeTable = [...]opInfo{
asm: x86.AVPSUBB,
reg: regInfo{
inputs: []inputInfo{
- {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+ {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
{1, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
},
outputs: []outputInfo{
@@ -33927,7 +34023,7 @@ var opcodeTable = [...]opInfo{
asm: x86.AVPSUBB,
reg: regInfo{
inputs: []inputInfo{
- {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+ {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
{1, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
},
outputs: []outputInfo{
@@ -34000,7 +34096,7 @@ var opcodeTable = [...]opInfo{
asm: x86.AVPSUBD,
reg: regInfo{
inputs: []inputInfo{
- {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+ {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
{1, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
},
outputs: []outputInfo{
@@ -34014,7 +34110,7 @@ var opcodeTable = [...]opInfo{
asm: x86.AVPSUBD,
reg: regInfo{
inputs: []inputInfo{
- {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+ {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
{1, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
},
outputs: []outputInfo{
@@ -34087,7 +34183,7 @@ var opcodeTable = [...]opInfo{
asm: x86.AVPSUBQ,
reg: regInfo{
inputs: []inputInfo{
- {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+ {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
{1, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
},
outputs: []outputInfo{
@@ -34101,7 +34197,7 @@ var opcodeTable = [...]opInfo{
asm: x86.AVPSUBQ,
reg: regInfo{
inputs: []inputInfo{
- {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+ {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
{1, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
},
outputs: []outputInfo{
@@ -34174,7 +34270,7 @@ var opcodeTable = [...]opInfo{
asm: x86.AVPSUBSB,
reg: regInfo{
inputs: []inputInfo{
- {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+ {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
{1, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
},
outputs: []outputInfo{
@@ -34188,7 +34284,7 @@ var opcodeTable = [...]opInfo{
asm: x86.AVPSUBSB,
reg: regInfo{
inputs: []inputInfo{
- {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+ {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
{1, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
},
outputs: []outputInfo{
@@ -34261,7 +34357,7 @@ var opcodeTable = [...]opInfo{
asm: x86.AVPSUBSW,
reg: regInfo{
inputs: []inputInfo{
- {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+ {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
{1, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
},
outputs: []outputInfo{
@@ -34275,7 +34371,7 @@ var opcodeTable = [...]opInfo{
asm: x86.AVPSUBSW,
reg: regInfo{
inputs: []inputInfo{
- {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+ {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
{1, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
},
outputs: []outputInfo{
@@ -34348,7 +34444,7 @@ var opcodeTable = [...]opInfo{
asm: x86.AVPSUBUSB,
reg: regInfo{
inputs: []inputInfo{
- {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+ {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
{1, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
},
outputs: []outputInfo{
@@ -34362,7 +34458,7 @@ var opcodeTable = [...]opInfo{
asm: x86.AVPSUBUSB,
reg: regInfo{
inputs: []inputInfo{
- {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+ {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
{1, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
},
outputs: []outputInfo{
@@ -34435,7 +34531,7 @@ var opcodeTable = [...]opInfo{
asm: x86.AVPSUBUSW,
reg: regInfo{
inputs: []inputInfo{
- {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+ {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
{1, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
},
outputs: []outputInfo{
@@ -34449,7 +34545,7 @@ var opcodeTable = [...]opInfo{
asm: x86.AVPSUBUSW,
reg: regInfo{
inputs: []inputInfo{
- {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+ {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
{1, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
},
outputs: []outputInfo{
@@ -34522,7 +34618,7 @@ var opcodeTable = [...]opInfo{
asm: x86.AVPSUBW,
reg: regInfo{
inputs: []inputInfo{
- {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+ {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
{1, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
},
outputs: []outputInfo{
@@ -34536,7 +34632,7 @@ var opcodeTable = [...]opInfo{
asm: x86.AVPSUBW,
reg: regInfo{
inputs: []inputInfo{
- {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+ {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
{1, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
},
outputs: []outputInfo{
@@ -34609,7 +34705,7 @@ var opcodeTable = [...]opInfo{
asm: x86.AVPUNPCKHDQ,
reg: regInfo{
inputs: []inputInfo{
- {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+ {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
{1, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
},
outputs: []outputInfo{
@@ -34623,7 +34719,7 @@ var opcodeTable = [...]opInfo{
asm: x86.AVPUNPCKHDQ,
reg: regInfo{
inputs: []inputInfo{
- {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+ {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
{1, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
},
outputs: []outputInfo{
@@ -34651,7 +34747,7 @@ var opcodeTable = [...]opInfo{
asm: x86.AVPUNPCKHQDQ,
reg: regInfo{
inputs: []inputInfo{
- {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+ {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
{1, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
},
outputs: []outputInfo{
@@ -34665,7 +34761,7 @@ var opcodeTable = [...]opInfo{
asm: x86.AVPUNPCKHQDQ,
reg: regInfo{
inputs: []inputInfo{
- {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+ {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
{1, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
},
outputs: []outputInfo{
@@ -34693,7 +34789,7 @@ var opcodeTable = [...]opInfo{
asm: x86.AVPUNPCKHWD,
reg: regInfo{
inputs: []inputInfo{
- {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+ {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
{1, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
},
outputs: []outputInfo{
@@ -34707,7 +34803,7 @@ var opcodeTable = [...]opInfo{
asm: x86.AVPUNPCKHWD,
reg: regInfo{
inputs: []inputInfo{
- {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+ {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
{1, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
},
outputs: []outputInfo{
@@ -34735,7 +34831,7 @@ var opcodeTable = [...]opInfo{
asm: x86.AVPUNPCKLDQ,
reg: regInfo{
inputs: []inputInfo{
- {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+ {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
{1, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
},
outputs: []outputInfo{
@@ -34749,7 +34845,7 @@ var opcodeTable = [...]opInfo{
asm: x86.AVPUNPCKLDQ,
reg: regInfo{
inputs: []inputInfo{
- {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+ {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
{1, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
},
outputs: []outputInfo{
@@ -34777,7 +34873,7 @@ var opcodeTable = [...]opInfo{
asm: x86.AVPUNPCKLQDQ,
reg: regInfo{
inputs: []inputInfo{
- {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+ {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
{1, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
},
outputs: []outputInfo{
@@ -34791,7 +34887,7 @@ var opcodeTable = [...]opInfo{
asm: x86.AVPUNPCKLQDQ,
reg: regInfo{
inputs: []inputInfo{
- {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+ {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
{1, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
},
outputs: []outputInfo{
@@ -34819,7 +34915,7 @@ var opcodeTable = [...]opInfo{
asm: x86.AVPUNPCKLWD,
reg: regInfo{
inputs: []inputInfo{
- {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+ {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
{1, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
},
outputs: []outputInfo{
@@ -34833,7 +34929,7 @@ var opcodeTable = [...]opInfo{
asm: x86.AVPUNPCKLWD,
reg: regInfo{
inputs: []inputInfo{
- {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+ {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
{1, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
},
outputs: []outputInfo{
@@ -34862,7 +34958,7 @@ var opcodeTable = [...]opInfo{
asm: x86.AVPXOR,
reg: regInfo{
inputs: []inputInfo{
- {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+ {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
{1, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
},
outputs: []outputInfo{
@@ -34877,7 +34973,7 @@ var opcodeTable = [...]opInfo{
asm: x86.AVPXOR,
reg: regInfo{
inputs: []inputInfo{
- {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+ {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
{1, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
},
outputs: []outputInfo{
@@ -35677,7 +35773,7 @@ var opcodeTable = [...]opInfo{
asm: x86.AVSUBPD,
reg: regInfo{
inputs: []inputInfo{
- {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+ {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
{1, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
},
outputs: []outputInfo{
@@ -35691,7 +35787,7 @@ var opcodeTable = [...]opInfo{
asm: x86.AVSUBPD,
reg: regInfo{
inputs: []inputInfo{
- {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+ {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
{1, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
},
outputs: []outputInfo{
@@ -35764,7 +35860,7 @@ var opcodeTable = [...]opInfo{
asm: x86.AVSUBPS,
reg: regInfo{
inputs: []inputInfo{
- {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+ {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
{1, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
},
outputs: []outputInfo{
@@ -35778,7 +35874,7 @@ var opcodeTable = [...]opInfo{
asm: x86.AVSUBPS,
reg: regInfo{
inputs: []inputInfo{
- {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+ {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
{1, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
},
outputs: []outputInfo{
@@ -36271,7 +36367,7 @@ var opcodeTable = [...]opInfo{
asm: x86.AVCMPPS,
reg: regInfo{
inputs: []inputInfo{
- {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+ {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
{1, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
},
outputs: []outputInfo{
@@ -36287,7 +36383,7 @@ var opcodeTable = [...]opInfo{
asm: x86.AVCMPPS,
reg: regInfo{
inputs: []inputInfo{
- {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+ {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
{1, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
},
outputs: []outputInfo{
@@ -36319,7 +36415,7 @@ var opcodeTable = [...]opInfo{
asm: x86.AVCMPPD,
reg: regInfo{
inputs: []inputInfo{
- {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+ {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
{1, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
},
outputs: []outputInfo{
@@ -36335,7 +36431,7 @@ var opcodeTable = [...]opInfo{
asm: x86.AVCMPPD,
reg: regInfo{
inputs: []inputInfo{
- {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+ {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
{1, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
},
outputs: []outputInfo{
@@ -37810,13 +37906,29 @@ var opcodeTable = [...]opInfo{
},
},
{
+ name: "SHA1RNDS4128",
+ auxType: auxUInt8,
+ argLen: 2,
+ resultInArg0: true,
+ asm: x86.ASHA1RNDS4,
+ reg: regInfo{
+ inputs: []inputInfo{
+ {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
+ {1, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+ },
+ outputs: []outputInfo{
+ {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
+ },
+ },
+ },
+ {
name: "VPERM2F128256",
auxType: auxUInt8,
argLen: 2,
asm: x86.AVPERM2F128,
reg: regInfo{
inputs: []inputInfo{
- {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+ {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
{1, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
},
outputs: []outputInfo{
@@ -37831,7 +37943,7 @@ var opcodeTable = [...]opInfo{
asm: x86.AVPERM2I128,
reg: regInfo{
inputs: []inputInfo{
- {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+ {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
{1, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
},
outputs: []outputInfo{
@@ -37906,7 +38018,7 @@ var opcodeTable = [...]opInfo{
asm: x86.AVINSERTF128,
reg: regInfo{
inputs: []inputInfo{
- {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+ {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
{1, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
},
outputs: []outputInfo{
@@ -37936,7 +38048,7 @@ var opcodeTable = [...]opInfo{
asm: x86.AVINSERTI128,
reg: regInfo{
inputs: []inputInfo{
- {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+ {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
{1, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
},
outputs: []outputInfo{
@@ -38524,7 +38636,7 @@ var opcodeTable = [...]opInfo{
asm: x86.AVSHUFPS,
reg: regInfo{
inputs: []inputInfo{
- {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+ {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
{1, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
},
outputs: []outputInfo{
@@ -38539,7 +38651,7 @@ var opcodeTable = [...]opInfo{
asm: x86.AVSHUFPD,
reg: regInfo{
inputs: []inputInfo{
- {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+ {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
{1, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
},
outputs: []outputInfo{
@@ -38554,7 +38666,7 @@ var opcodeTable = [...]opInfo{
asm: x86.AVSHUFPS,
reg: regInfo{
inputs: []inputInfo{
- {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+ {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
{1, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
},
outputs: []outputInfo{
@@ -38584,7 +38696,7 @@ var opcodeTable = [...]opInfo{
asm: x86.AVSHUFPD,
reg: regInfo{
inputs: []inputInfo{
- {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+ {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
{1, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
},
outputs: []outputInfo{
@@ -80650,6 +80762,66 @@ var opcodeTable = [...]opInfo{
generic: true,
},
{
+ name: "SHA1Msg1Int32x4",
+ argLen: 2,
+ generic: true,
+ },
+ {
+ name: "SHA1Msg1Uint32x4",
+ argLen: 2,
+ generic: true,
+ },
+ {
+ name: "SHA1Msg2Int32x4",
+ argLen: 2,
+ generic: true,
+ },
+ {
+ name: "SHA1Msg2Uint32x4",
+ argLen: 2,
+ generic: true,
+ },
+ {
+ name: "SHA1NextEInt32x4",
+ argLen: 2,
+ generic: true,
+ },
+ {
+ name: "SHA1NextEUint32x4",
+ argLen: 2,
+ generic: true,
+ },
+ {
+ name: "SHA256Msg1Int32x4",
+ argLen: 2,
+ generic: true,
+ },
+ {
+ name: "SHA256Msg1Uint32x4",
+ argLen: 2,
+ generic: true,
+ },
+ {
+ name: "SHA256Msg2Int32x4",
+ argLen: 2,
+ generic: true,
+ },
+ {
+ name: "SHA256Msg2Uint32x4",
+ argLen: 2,
+ generic: true,
+ },
+ {
+ name: "SHA256Rounds2Int32x4",
+ argLen: 3,
+ generic: true,
+ },
+ {
+ name: "SHA256Rounds2Uint32x4",
+ argLen: 3,
+ generic: true,
+ },
+ {
name: "ScaleFloat32x4",
argLen: 2,
generic: true,
@@ -82583,6 +82755,18 @@ var opcodeTable = [...]opInfo{
generic: true,
},
{
+ name: "SHA1Round4Int32x4",
+ auxType: auxUInt8,
+ argLen: 2,
+ generic: true,
+ },
+ {
+ name: "SHA1Round4Uint32x4",
+ auxType: auxUInt8,
+ argLen: 2,
+ generic: true,
+ },
+ {
name: "Select128FromPairFloat32x8",
auxType: auxUInt8,
argLen: 2,
diff --git a/src/cmd/compile/internal/ssa/rewriteAMD64.go b/src/cmd/compile/internal/ssa/rewriteAMD64.go
index 89b6d1600b..83f8e0dc2e 100644
--- a/src/cmd/compile/internal/ssa/rewriteAMD64.go
+++ b/src/cmd/compile/internal/ssa/rewriteAMD64.go
@@ -4978,6 +4978,48 @@ func rewriteValueAMD64(v *Value) bool {
return rewriteValueAMD64_OpRsh8x64(v)
case OpRsh8x8:
return rewriteValueAMD64_OpRsh8x8(v)
+ case OpSHA1Msg1Int32x4:
+ v.Op = OpAMD64SHA1MSG1128
+ return true
+ case OpSHA1Msg1Uint32x4:
+ v.Op = OpAMD64SHA1MSG1128
+ return true
+ case OpSHA1Msg2Int32x4:
+ v.Op = OpAMD64SHA1MSG2128
+ return true
+ case OpSHA1Msg2Uint32x4:
+ v.Op = OpAMD64SHA1MSG2128
+ return true
+ case OpSHA1NextEInt32x4:
+ v.Op = OpAMD64SHA1NEXTE128
+ return true
+ case OpSHA1NextEUint32x4:
+ v.Op = OpAMD64SHA1NEXTE128
+ return true
+ case OpSHA1Round4Int32x4:
+ v.Op = OpAMD64SHA1RNDS4128
+ return true
+ case OpSHA1Round4Uint32x4:
+ v.Op = OpAMD64SHA1RNDS4128
+ return true
+ case OpSHA256Msg1Int32x4:
+ v.Op = OpAMD64SHA256MSG1128
+ return true
+ case OpSHA256Msg1Uint32x4:
+ v.Op = OpAMD64SHA256MSG1128
+ return true
+ case OpSHA256Msg2Int32x4:
+ v.Op = OpAMD64SHA256MSG1128
+ return true
+ case OpSHA256Msg2Uint32x4:
+ v.Op = OpAMD64SHA256MSG1128
+ return true
+ case OpSHA256Rounds2Int32x4:
+ v.Op = OpAMD64SHA256RNDS2128
+ return true
+ case OpSHA256Rounds2Uint32x4:
+ v.Op = OpAMD64SHA256RNDS2128
+ return true
case OpScaleFloat32x16:
v.Op = OpAMD64VSCALEFPS512
return true
diff --git a/src/cmd/compile/internal/ssagen/intrinsics.go b/src/cmd/compile/internal/ssagen/intrinsics.go
index f663680fc4..b3b9314b0d 100644
--- a/src/cmd/compile/internal/ssagen/intrinsics.go
+++ b/src/cmd/compile/internal/ssagen/intrinsics.go
@@ -1987,6 +1987,19 @@ func opLen2Imm8_II(op ssa.Op, t *types.Type, _ int) func(s *state, n *ir.CallExp
}
}
+// The assembler requires the imm value of a SHA1RNDS4 instruction to be one of 0,1,2,3...
+func opLen2Imm8_SHA1RNDS4(op ssa.Op, t *types.Type, offset int) func(s *state, n *ir.CallExpr, args []*ssa.Value) *ssa.Value {
+ return func(s *state, n *ir.CallExpr, args []*ssa.Value) *ssa.Value {
+ if args[1].Op == ssa.OpConst8 {
+ return s.newValue2I(op, t, (args[1].AuxInt<<int64(offset))&0b11, args[0], args[2])
+ }
+ return immJumpTable(s, args[1], n, func(sNew *state, idx int) {
+ // Encode as int8 due to requirement of AuxInt, check its comment for details.
+ s.vars[n] = sNew.newValue2I(op, t, int64(int8(idx<<offset))&0b11, args[0], args[2])
+ })
+ }
+}
+
func opLen3Imm8_2I(op ssa.Op, t *types.Type, offset int) func(s *state, n *ir.CallExpr, args []*ssa.Value) *ssa.Value {
return func(s *state, n *ir.CallExpr, args []*ssa.Value) *ssa.Value {
if args[2].Op == ssa.OpConst8 {
diff --git a/src/cmd/compile/internal/ssagen/simdintrinsics.go b/src/cmd/compile/internal/ssagen/simdintrinsics.go
index 5b6b25fb70..6e02860916 100644
--- a/src/cmd/compile/internal/ssagen/simdintrinsics.go
+++ b/src/cmd/compile/internal/ssagen/simdintrinsics.go
@@ -951,6 +951,20 @@ func simdIntrinsics(addF func(pkg, fn string, b intrinsicBuilder, archFamilies .
addF(simdPackage, "Float64x2.RoundToEvenScaledResidue", opLen1Imm8(ssa.OpRoundToEvenScaledResidueFloat64x2, types.TypeVec128, 4), sys.AMD64)
addF(simdPackage, "Float64x4.RoundToEvenScaledResidue", opLen1Imm8(ssa.OpRoundToEvenScaledResidueFloat64x4, types.TypeVec256, 4), sys.AMD64)
addF(simdPackage, "Float64x8.RoundToEvenScaledResidue", opLen1Imm8(ssa.OpRoundToEvenScaledResidueFloat64x8, types.TypeVec512, 4), sys.AMD64)
+ addF(simdPackage, "Int32x4.SHA1Msg1", opLen2(ssa.OpSHA1Msg1Int32x4, types.TypeVec128), sys.AMD64)
+ addF(simdPackage, "Uint32x4.SHA1Msg1", opLen2(ssa.OpSHA1Msg1Uint32x4, types.TypeVec128), sys.AMD64)
+ addF(simdPackage, "Int32x4.SHA1Msg2", opLen2(ssa.OpSHA1Msg2Int32x4, types.TypeVec128), sys.AMD64)
+ addF(simdPackage, "Uint32x4.SHA1Msg2", opLen2(ssa.OpSHA1Msg2Uint32x4, types.TypeVec128), sys.AMD64)
+ addF(simdPackage, "Int32x4.SHA1NextE", opLen2(ssa.OpSHA1NextEInt32x4, types.TypeVec128), sys.AMD64)
+ addF(simdPackage, "Uint32x4.SHA1NextE", opLen2(ssa.OpSHA1NextEUint32x4, types.TypeVec128), sys.AMD64)
+ addF(simdPackage, "Int32x4.SHA1Round4", opLen2Imm8_SHA1RNDS4(ssa.OpSHA1Round4Int32x4, types.TypeVec128, 0), sys.AMD64)
+ addF(simdPackage, "Uint32x4.SHA1Round4", opLen2Imm8_SHA1RNDS4(ssa.OpSHA1Round4Uint32x4, types.TypeVec128, 0), sys.AMD64)
+ addF(simdPackage, "Int32x4.SHA256Msg1", opLen2(ssa.OpSHA256Msg1Int32x4, types.TypeVec128), sys.AMD64)
+ addF(simdPackage, "Uint32x4.SHA256Msg1", opLen2(ssa.OpSHA256Msg1Uint32x4, types.TypeVec128), sys.AMD64)
+ addF(simdPackage, "Int32x4.SHA256Msg2", opLen2(ssa.OpSHA256Msg2Int32x4, types.TypeVec128), sys.AMD64)
+ addF(simdPackage, "Uint32x4.SHA256Msg2", opLen2(ssa.OpSHA256Msg2Uint32x4, types.TypeVec128), sys.AMD64)
+ addF(simdPackage, "Int32x4.SHA256Rounds2", opLen3(ssa.OpSHA256Rounds2Int32x4, types.TypeVec128), sys.AMD64)
+ addF(simdPackage, "Uint32x4.SHA256Rounds2", opLen3(ssa.OpSHA256Rounds2Uint32x4, types.TypeVec128), sys.AMD64)
addF(simdPackage, "Float32x4.Scale", opLen2(ssa.OpScaleFloat32x4, types.TypeVec128), sys.AMD64)
addF(simdPackage, "Float32x8.Scale", opLen2(ssa.OpScaleFloat32x8, types.TypeVec256), sys.AMD64)
addF(simdPackage, "Float32x16.Scale", opLen2(ssa.OpScaleFloat32x16, types.TypeVec512), sys.AMD64)
generated by cgit v1.3-5-g9baa (git 2.53.0) at 2026-04-17 16:29:28 +0000