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| author | Junyang Shao <shaojunyang@google.com> | 2025-07-09 19:06:13 +0000 |
|---|---|---|
| committer | Junyang Shao <shaojunyang@google.com> | 2025-07-11 11:01:55 -0700 |
| commit | ccb43dcec791cb70431840ec2138addb489b828e (patch) | |
| tree | 8d7a2c5810999f4761daa9aaab36e61fa273f2e1 /src/cmd/compile | |
| parent | 21596f2f756edd4a5d67f0bfedb435bc1b29c6b3 (diff) | |
| download | go-ccb43dcec791cb70431840ec2138addb489b828e.tar.xz | |
[dev.simd] cmd/compile: add VZEROUPPER and VZEROALL inst
Change-Id: I41d60561fefdfa676e8b22648871ff1004711ac9
Reviewed-on: https://go-review.googlesource.com/c/go/+/686840
LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
Reviewed-by: David Chase <drchase@google.com>
Diffstat (limited to 'src/cmd/compile')
| -rw-r--r-- | src/cmd/compile/internal/amd64/ssa.go | 2 | ||||
| -rw-r--r-- | src/cmd/compile/internal/ssa/_gen/AMD64Ops.go | 3 | ||||
| -rw-r--r-- | src/cmd/compile/internal/ssa/opGen.go | 14 |
3 files changed, 19 insertions, 0 deletions
diff --git a/src/cmd/compile/internal/amd64/ssa.go b/src/cmd/compile/internal/amd64/ssa.go index 3e45097edf..9c31b77e70 100644 --- a/src/cmd/compile/internal/amd64/ssa.go +++ b/src/cmd/compile/internal/amd64/ssa.go @@ -1445,6 +1445,8 @@ func ssaGenValue(s *ssagen.State, v *ssa.Value) { // XXX SIMD // XXX may change depending on how we handle aliased registers + case ssa.OpAMD64VZEROUPPER, ssa.OpAMD64VZEROALL: + s.Prog(v.Op.Asm()) case ssa.OpAMD64Zero128, ssa.OpAMD64Zero256, ssa.OpAMD64Zero512: p := s.Prog(v.Op.Asm()) p.From.Type = obj.TYPE_REG diff --git a/src/cmd/compile/internal/ssa/_gen/AMD64Ops.go b/src/cmd/compile/internal/ssa/_gen/AMD64Ops.go index 35d26dfdfa..543233f4d8 100644 --- a/src/cmd/compile/internal/ssa/_gen/AMD64Ops.go +++ b/src/cmd/compile/internal/ssa/_gen/AMD64Ops.go @@ -1311,6 +1311,9 @@ func init() { {name: "Zero128", argLength: 0, reg: v01, asm: "VPXOR"}, {name: "Zero256", argLength: 0, reg: v01, asm: "VPXOR"}, {name: "Zero512", argLength: 0, reg: w01, asm: "VPXORQ"}, + + {name: "VZEROUPPER", argLength: 0, asm: "VZEROUPPER"}, + {name: "VZEROALL", argLength: 0, asm: "VZEROALL"}, } var AMD64blocks = []blockData{ diff --git a/src/cmd/compile/internal/ssa/opGen.go b/src/cmd/compile/internal/ssa/opGen.go index dc84a1f4fa..119badedcc 100644 --- a/src/cmd/compile/internal/ssa/opGen.go +++ b/src/cmd/compile/internal/ssa/opGen.go @@ -1196,6 +1196,8 @@ const ( OpAMD64Zero128 OpAMD64Zero256 OpAMD64Zero512 + OpAMD64VZEROUPPER + OpAMD64VZEROALL OpAMD64VADDPS512 OpAMD64VADDPSMasked512 OpAMD64VRCP14PS512 @@ -18566,6 +18568,18 @@ var opcodeTable = [...]opInfo{ }, }, { + name: "VZEROUPPER", + argLen: 0, + asm: x86.AVZEROUPPER, + reg: regInfo{}, + }, + { + name: "VZEROALL", + argLen: 0, + asm: x86.AVZEROALL, + reg: regInfo{}, + }, + { name: "VADDPS512", argLen: 2, commutative: true, |