diff options
| author | Joel Sing <joel@sing.id.au> | 2019-09-19 00:59:26 +1000 |
|---|---|---|
| committer | Joel Sing <joel@sing.id.au> | 2019-09-24 04:19:31 +0000 |
| commit | e29d276d55bc0743a0fb66ea4a4967f937153567 (patch) | |
| tree | c9aee5bf1d41d7ae40540ad8c7a06055e5e84b39 /src/cmd/asm | |
| parent | ced2454220e472c233d4f58a2bc9d01347dedfd3 (diff) | |
| download | go-e29d276d55bc0743a0fb66ea4a4967f937153567.tar.xz | |
cmd/internal/obj/riscv: implement RV64I integer computational instructions
Add support for assembling RV64I integer computational instructions.
Based on the riscv-go port.
Updates #27532
Integer Computational Instructions (RV64I)
Change-Id: I1a082b3901c997da309d737d081f57ea2821bc62
Reviewed-on: https://go-review.googlesource.com/c/go/+/196838
Reviewed-by: Cherry Zhang <cherryyz@google.com>
Run-TryBot: Cherry Zhang <cherryyz@google.com>
TryBot-Result: Gobot Gobot <gobot@golang.org>
Diffstat (limited to 'src/cmd/asm')
| -rw-r--r-- | src/cmd/asm/internal/asm/testdata/riscvenc.s | 11 |
1 files changed, 11 insertions, 0 deletions
diff --git a/src/cmd/asm/internal/asm/testdata/riscvenc.s b/src/cmd/asm/internal/asm/testdata/riscvenc.s index 1902138504..8ee7f18a16 100644 --- a/src/cmd/asm/internal/asm/testdata/riscvenc.s +++ b/src/cmd/asm/internal/asm/testdata/riscvenc.s @@ -95,6 +95,17 @@ TEXT asmtest(SB),DUPOK|NOSPLIT,$0 SB $0, X5, X6 // 23005300 SB $4, X5, X6 // 23025300 + // 5.2: Integer Computational Instructions (RV64I) + ADDIW $1, X5, X6 // 1b831200 + SLLIW $1, X5, X6 // 1b931200 + SRLIW $1, X5, X6 // 1bd31200 + SRAIW $1, X5, X6 // 1bd31240 + ADDW X5, X6, X7 // bb035300 + SLLW X5, X6, X7 // bb135300 + SRLW X5, X6, X7 // bb535300 + SUBW X5, X6, X7 // bb035340 + SRAW X5, X6, X7 // bb535340 + // 5.3: Load and Store Instructions (RV64I) LD $0, X5, X6 // 03b30200 LD $4, X5, X6 // 03b34200 |