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| author | Guoqi Chen <chenguoqi@loongson.cn> | 2022-08-04 18:13:59 +0800 |
|---|---|---|
| committer | Wayne Zuo <wdvxdr@golangcn.org> | 2023-02-06 13:49:53 +0000 |
| commit | bf8d142b4ebe9f84e75b20a87d292d2d6ec13fab (patch) | |
| tree | 5a08f5971b654ca73a5afb81a1935ed21414d265 /src/cmd/asm | |
| parent | a432d89137ae09c76717695064d8b1b13344b32b (diff) | |
| download | go-bf8d142b4ebe9f84e75b20a87d292d2d6ec13fab.tar.xz | |
cmd/asm: add RDTIME{L,H}.W, RDTIME.D support for loong64
Instruction formats: rdtime rd, rj
The RDTIME family of instructions are used to read constant frequency timer
information, the stable counter value is written into the general register
rd, and the counter id information is written into the general register rj.
(Note: both of its register operands are outputs).
Ref: https://loongson.github.io/LoongArch-Documentation/LoongArch-Vol1-EN.html
Change-Id: Ida5bbb28316ef70b5f616dac3e6fa6f2e77875b5
Reviewed-on: https://go-review.googlesource.com/c/go/+/421655
Reviewed-by: xiaodong liu <teaofmoli@gmail.com>
Reviewed-by: WANG Xuerui <git@xen0n.name>
Reviewed-by: Wayne Zuo <wdvxdr@golangcn.org>
Reviewed-by: Cherry Mui <cherryyz@google.com>
Reviewed-by: Michael Knyszek <mknyszek@google.com>
Run-TryBot: Wayne Zuo <wdvxdr@golangcn.org>
TryBot-Result: Gopher Robot <gobot@golang.org>
Reviewed-by: Meidan Li <limeidan@loongson.cn>
Diffstat (limited to 'src/cmd/asm')
| -rw-r--r-- | src/cmd/asm/internal/arch/loong64.go | 11 | ||||
| -rw-r--r-- | src/cmd/asm/internal/asm/asm.go | 12 | ||||
| -rw-r--r-- | src/cmd/asm/internal/asm/testdata/loong64enc1.s | 4 |
3 files changed, 27 insertions, 0 deletions
diff --git a/src/cmd/asm/internal/arch/loong64.go b/src/cmd/asm/internal/arch/loong64.go index ebf842c1f2..2958ee1a86 100644 --- a/src/cmd/asm/internal/arch/loong64.go +++ b/src/cmd/asm/internal/arch/loong64.go @@ -44,6 +44,17 @@ func IsLoong64MUL(op obj.As) bool { return false } +// IsLoong64RDTIME reports whether the op (as defined by an loong64.A* +// constant) is one of the RDTIMELW/RDTIMEHW/RDTIMED instructions that +// require special handling. +func IsLoong64RDTIME(op obj.As) bool { + switch op { + case loong64.ARDTIMELW, loong64.ARDTIMEHW, loong64.ARDTIMED: + return true + } + return false +} + func loong64RegisterNumber(name string, n int16) (int16, bool) { switch name { case "F": diff --git a/src/cmd/asm/internal/asm/asm.go b/src/cmd/asm/internal/asm/asm.go index 00fb7f417f..4d0eeacc74 100644 --- a/src/cmd/asm/internal/asm/asm.go +++ b/src/cmd/asm/internal/asm/asm.go @@ -642,6 +642,18 @@ func (p *Parser) asmInstruction(op obj.As, cond string, a []obj.Addr) { prog.Reg = p.getRegister(prog, op, &a[1]) break } + + if arch.IsLoong64RDTIME(op) { + // The Loong64 RDTIME family of instructions is a bit special, + // in that both its register operands are outputs + prog.To = a[0] + if a[1].Type != obj.TYPE_REG { + p.errorf("invalid addressing modes for 2nd operand to %s instruction, must be register", op) + return + } + prog.RegTo2 = a[1].Reg + break + } } prog.From = a[0] prog.To = a[1] diff --git a/src/cmd/asm/internal/asm/testdata/loong64enc1.s b/src/cmd/asm/internal/asm/testdata/loong64enc1.s index 83bb6ec078..0cc077c091 100644 --- a/src/cmd/asm/internal/asm/testdata/loong64enc1.s +++ b/src/cmd/asm/internal/asm/testdata/loong64enc1.s @@ -218,3 +218,7 @@ lable2: CMPGEF F4, R5 // a090130c CMPGED F4, R5 // a090230c CMPEQD F4, R5 // a010220c + + RDTIMELW R4, R0 // 80600000 + RDTIMEHW R4, R0 // 80640000 + RDTIMED R4, R5 // 85680000 |