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| author | isharipo <iskander.sharipov@intel.com> | 2017-08-18 14:56:12 +0300 |
|---|---|---|
| committer | Ilya Tocar <ilya.tocar@intel.com> | 2017-09-06 15:37:20 +0000 |
| commit | b15e8babc8bfb4ef17a543fdcb23d63e4d76dbf3 (patch) | |
| tree | 4720e6c7020d8aee8cb5ce4d9aa01e1ae03c27fb /src/cmd/asm | |
| parent | 4074e4e5be5988a0c168eeba6417e7aceac7d9a5 (diff) | |
| download | go-b15e8babc8bfb4ef17a543fdcb23d63e4d76dbf3.tar.xz | |
cmd/asm: add amd64 PALIGNR instruction
3rd change out of 3 to cover AMD64 SSSE3 instruction set in Go asm.
This commit adds instruction that do require new ytab variable.
Change-Id: I0bc7d9401c9176eb3760c3d59494ef082e97af84
Reviewed-on: https://go-review.googlesource.com/56870
Run-TryBot: Iskander Sharipov <iskander.sharipov@intel.com>
TryBot-Result: Gobot Gobot <gobot@golang.org>
Reviewed-by: Ilya Tocar <ilya.tocar@intel.com>
Reviewed-by: Russ Cox <rsc@golang.org>
Diffstat (limited to 'src/cmd/asm')
| -rw-r--r-- | src/cmd/asm/internal/asm/testdata/amd64enc.s | 16 |
1 files changed, 8 insertions, 8 deletions
diff --git a/src/cmd/asm/internal/asm/testdata/amd64enc.s b/src/cmd/asm/internal/asm/testdata/amd64enc.s index ed80f6f92e..040e944b70 100644 --- a/src/cmd/asm/internal/asm/testdata/amd64enc.s +++ b/src/cmd/asm/internal/asm/testdata/amd64enc.s @@ -3315,14 +3315,14 @@ TEXT asmtest(SB),DUPOK|NOSPLIT,$0 //TODO: PALIGNR $7, (R11), M3 // 410f3a0f1b07 //TODO: PALIGNR $7, M2, M3 // 0f3a0fda07 //TODO: PALIGNR $7, M3, M3 // 0f3a0fdb07 - //TODO: PALIGNR $7, (BX), X2 // 660f3a0f1307 - //TODO: PALIGNR $7, (R11), X2 // 66410f3a0f1307 - //TODO: PALIGNR $7, X2, X2 // 660f3a0fd207 - //TODO: PALIGNR $7, X11, X2 // 66410f3a0fd307 - //TODO: PALIGNR $7, (BX), X11 // 66440f3a0f1b07 - //TODO: PALIGNR $7, (R11), X11 // 66450f3a0f1b07 - //TODO: PALIGNR $7, X2, X11 // 66440f3a0fda07 - //TODO: PALIGNR $7, X11, X11 // 66450f3a0fdb07 + PALIGNR $7, (BX), X2 // 660f3a0f1307 + PALIGNR $7, (R11), X2 // 66410f3a0f1307 + PALIGNR $7, X2, X2 // 660f3a0fd207 + PALIGNR $7, X11, X2 // 66410f3a0fd307 + PALIGNR $7, (BX), X11 // 66440f3a0f1b07 + PALIGNR $7, (R11), X11 // 66450f3a0f1b07 + PALIGNR $7, X2, X11 // 66440f3a0fda07 + PALIGNR $7, X11, X11 // 66450f3a0fdb07 PAND (BX), M2 // 0fdb13 PAND (R11), M2 // 410fdb13 PAND M2, M2 // 0fdbd2 |