diff options
| author | Joel Sing <joel@sing.id.au> | 2023-12-09 19:18:00 +1100 |
|---|---|---|
| committer | Joel Sing <joel@sing.id.au> | 2024-03-22 04:42:21 +0000 |
| commit | a6ecdf29e34ddc82b6ed2315aaedf4c4d522b96c (patch) | |
| tree | 8c1d2eb47fb8059a46dad65adad088e90901c321 /src/cmd/asm | |
| parent | ac0b2f95a5f25e9e331352c93e38f9b29bee9ccc (diff) | |
| download | go-a6ecdf29e34ddc82b6ed2315aaedf4c4d522b96c.tar.xz | |
cmd/internal/obj/riscv: improve register MOVB/MOVH/MOVBU/MOVHU for rva22u64
When GORISCV64 enables rva22u64, use SEXTB for MOVB, SEXTH for MOVH, ZEXTH
for MOVHU and ADDUW for MOVWU. These are single instruction alternatives
to the two instruction shift sequences that are needed otherwise.
Change-Id: Iea5e394f57e238ae8771400a87287c1ee507d44c
Reviewed-on: https://go-review.googlesource.com/c/go/+/572736
Reviewed-by: David Chase <drchase@google.com>
Run-TryBot: Joel Sing <joel@sing.id.au>
Reviewed-by: Mark Ryan <markdryan@rivosinc.com>
LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
TryBot-Result: Gopher Robot <gobot@golang.org>
Reviewed-by: Cherry Mui <cherryyz@google.com>
Reviewed-by: M Zhuo <mengzhuo1203@gmail.com>
Diffstat (limited to 'src/cmd/asm')
| -rw-r--r-- | src/cmd/asm/internal/asm/testdata/riscv64.s | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/src/cmd/asm/internal/asm/testdata/riscv64.s b/src/cmd/asm/internal/asm/testdata/riscv64.s index b96bc844c0..5c8d529029 100644 --- a/src/cmd/asm/internal/asm/testdata/riscv64.s +++ b/src/cmd/asm/internal/asm/testdata/riscv64.s @@ -462,12 +462,12 @@ start: MOVW X5, (X6) // 23205300 MOVW X5, 4(X6) // 23225300 - MOVB X5, X6 // 1393820313538343 - MOVH X5, X6 // 1393020313530343 + MOVB X5, X6 // 1393820313538343 or 13934260 + MOVH X5, X6 // 1393020313530343 or 13935260 MOVW X5, X6 // 1b830200 MOVBU X5, X6 // 13f3f20f - MOVHU X5, X6 // 1393020313530303 - MOVWU X5, X6 // 1393020213530302 + MOVHU X5, X6 // 1393020313530303 or 3bc30208 + MOVWU X5, X6 // 1393020213530302 or 3b830208 MOVF 4(X5), F0 // 07a04200 MOVF F0, 4(X5) // 27a20200 |