diff options
| author | Lynn Boger <laboger@linux.vnet.ibm.com> | 2017-04-12 14:22:16 -0400 |
|---|---|---|
| committer | Lynn Boger <laboger@linux.vnet.ibm.com> | 2017-04-17 21:24:35 +0000 |
| commit | 7d4cca07d2c6890fb39635aaa5b3b8d902bf2cbf (patch) | |
| tree | 5df4eabafd7d8311530f9bb4658111a17c351348 /src/cmd/asm | |
| parent | 16db1892d32bffdcc636665ba0325142b3c7ad72 (diff) | |
| download | go-7d4cca07d2c6890fb39635aaa5b3b8d902bf2cbf.tar.xz | |
cmd/asm: detect invalid DS form offsets for ppc64x
While debugging a recent regression it was discovered that
the assembler for ppc64x was not always generating the correct
instruction for DS form loads and stores. When an instruction
is DS form then the offset must be a multiple of 4, and if it
isn't then bits outside the offset field were being incorrectly
set resulting in unexpected and incorrect instructions.
This change adds a check to determine when the opcode is DS form
and then verifies that the offset is a multiple of 4 before
generating the instruction, otherwise logs an error.
This also changes a few asm files that were using unaligned offsets
for DS form loads and stores. In the runtime package these were
instructions intended to cause a crash so using aligned or unaligned
offsets doesn't change that behavior.
Change-Id: Ie3a7e1e65dcc9933b54de7a46a054da8459cb56f
Reviewed-on: https://go-review.googlesource.com/40476
Reviewed-by: Michael Hudson-Doyle <michael.hudson@canonical.com>
Diffstat (limited to 'src/cmd/asm')
| -rw-r--r-- | src/cmd/asm/internal/asm/testdata/ppc64.s | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/src/cmd/asm/internal/asm/testdata/ppc64.s b/src/cmd/asm/internal/asm/testdata/ppc64.s index 14b0de1271..e266593050 100644 --- a/src/cmd/asm/internal/asm/testdata/ppc64.s +++ b/src/cmd/asm/internal/asm/testdata/ppc64.s @@ -24,7 +24,7 @@ TEXT foo(SB),DUPOK|NOSPLIT,$0 // { // outcode(int($1), &$2, 0, &$4); // } - MOVW foo<>+3(SB), R2 + MOVW foo<>+4(SB), R2 MOVW 16(R1), R2 // LMOVW regaddr ',' rreg @@ -61,7 +61,7 @@ TEXT foo(SB),DUPOK|NOSPLIT,$0 // { // outcode(int($1), &$2, 0, &$4); // } - FMOVD foo<>+3(SB), F2 + FMOVD foo<>+4(SB), F2 FMOVD 16(R1), F2 // LFMOV regaddr ',' freg @@ -86,7 +86,7 @@ TEXT foo(SB),DUPOK|NOSPLIT,$0 // { // outcode(int($1), &$2, 0, &$4); // } - FMOVD F2, foo<>+3(SB) + FMOVD F2, foo<>+4(SB) FMOVD F2, 16(R1) // LFMOV freg ',' regaddr @@ -132,7 +132,7 @@ TEXT foo(SB),DUPOK|NOSPLIT,$0 // { // outcode(int($1), &$2, 0, &$4); // } - FMOVD F1, foo<>+3(SB) + FMOVD F1, foo<>+4(SB) FMOVD F1, 16(R2) // LMOVW freg ',' regaddr |