diff options
| author | isharipo <iskander.sharipov@intel.com> | 2018-05-22 19:13:44 +0300 |
|---|---|---|
| committer | Ilya Tocar <ilya.tocar@intel.com> | 2018-05-23 15:34:19 +0000 |
| commit | 67fe8b5677c8dca1503550ca72d1e460bca0375c (patch) | |
| tree | f556262104762415eeadd28599a3f29a2c78e3f9 /src/cmd/asm | |
| parent | 1764609b8b245323210eab39c4b586291d3a45a5 (diff) | |
| download | go-67fe8b5677c8dca1503550ca72d1e460bca0375c.tar.xz | |
cmd/internal/obj/x86: add missing Yi8 for VEX ytabs
This change adds Yi8 forms for every ytab that had them before AVX-512 patch.
The rationale is backwards-compatibility.
EVEX forms remain strict and unchanged as they're not bound to any
backwards-compatibility issues.
Fixes #25510
Change-Id: Icd692266010ed64c9fe47cc837afc2edf2ad2d1d
Reviewed-on: https://go-review.googlesource.com/114136
Run-TryBot: Iskander Sharipov <iskander.sharipov@intel.com>
TryBot-Result: Gobot Gobot <gobot@golang.org>
Reviewed-by: Ilya Tocar <ilya.tocar@intel.com>
Diffstat (limited to 'src/cmd/asm')
| -rw-r--r-- | src/cmd/asm/internal/asm/testdata/amd64enc_extra.s | 54 |
1 files changed, 54 insertions, 0 deletions
diff --git a/src/cmd/asm/internal/asm/testdata/amd64enc_extra.s b/src/cmd/asm/internal/asm/testdata/amd64enc_extra.s index 7fd481abf3..647628176a 100644 --- a/src/cmd/asm/internal/asm/testdata/amd64enc_extra.s +++ b/src/cmd/asm/internal/asm/testdata/amd64enc_extra.s @@ -317,5 +317,59 @@ TEXT asmtest(SB),DUPOK|NOSPLIT,$0 PUSHQ FS // 0fa0 POPQ FS // 0fa1 POPQ GS // 0fa9 + // All instructions below semantically have unsigned operands, + // but previous assembler permitted negative arguments. + // This behavior is preserved for compatibility reasons. + VPSHUFD $-79, X7, X7 // c5f970ffb1 + RORXL $-1, (AX), DX // c4e37bf010ff + RORXQ $-1, (AX), DX // c4e3fbf010ff + VPSHUFD $-1, X1, X2 // c5f970d1ff + VPSHUFD $-1, Y1, Y2 // c5fd70d1ff + VPSHUFHW $-1, X1, X2 // c5fa70d1ff + VPSHUFHW $-1, Y1, Y2 // c5fe70d1ff + VPSHUFLW $-1, X1, X2 // c5fb70d1ff + VPSHUFLW $-1, Y1, Y2 // c5ff70d1ff + VROUNDPD $-1, X1, X2 // c4e37909d1ff + VROUNDPS $-1, Y1, Y2 // c4e37d08d1ff + VPSLLD $-1, X1, X2 // c5e972f1ff + VPSLLD $-1, Y1, Y2 // c5ed72f1ff + VPSLLDQ $-1, X1, X2 // c5e973f9ff + VPSLLDQ $-1, Y1, Y2 // c5ed73f9ff + VPSLLQ $-1, X1, X2 // c5e973f1ff + VPSLLQ $-1, Y1, Y2 // c5ed73f1ff + VPSRLD $-1, X1, X2 // c5e972d1ff + VPSRLD $-1, Y1, Y2 // c5ed72d1ff + VPSRLDQ $-1, X1, X2 // c5e973d9ff + VPSRLDQ $-1, Y1, Y2 // c5ed73d9ff + VPSRLQ $-1, X1, X2 // c5e973d1ff + VPSRLQ $-1, Y1, Y2 // c5ed73d1ff + VPEXTRW $-1, X1, (AX) // c4e3791508ff + VPEXTRW $-1, X1, AX // c4e37915c8ff + VEXTRACTF128 $-1, Y1, X2 // c4e37d19caff + VEXTRACTI128 $-1, Y1, X2 // c4e37d39caff + VAESKEYGENASSIST $-1, X1, X2 // c4e379dfd1ff + VPCMPESTRI $-1, X1, X2 // c4e37961d1ff + VPCMPESTRM $-1, X1, X2 // c4e37960d1ff + VPCMPISTRI $-1, X1, X2 // c4e37963d1ff + VPCMPISTRM $-1, X1, X2 // c4e37962d1ff + VPERMPD $-1, Y1, Y2 // c4e3fd01d1ff + VPERMILPD $-1, X1, X2 // c4e37905d1ff + VPERMILPD $-1, Y1, Y2 // c4e37d05d1ff + VPERMILPS $-1, X1, X2 // c4e37904d1ff + VPERMILPS $-1, Y1, Y2 // c4e37d04d1ff + VCVTPS2PH $-1, X1, X2 // c4e3791dcaff + VCVTPS2PH $-1, Y1, X2 // c4e37d1dcaff + VPSLLW $-1, X1, X2 // c5e971f1ff + VPSLLW $-1, Y1, Y2 // c5ed71f1ff + VPSRAD $-1, X1, X2 // c5e972e1ff + VPSRAD $-1, Y1, Y2 // c5ed72e1ff + VPSRAW $-1, X1, X2 // c5e971e1ff + VPSRAW $-1, Y1, Y2 // c5ed71e1ff + VPSRLW $-1, X1, X1 // c5f171d1ff + VPSRLW $-1, Y1, Y2 // c5ed71d1ff + VEXTRACTPS $-1, X1, AX // c4e37917c8ff + VPEXTRB $-1, X1, AX // c4e37914c8ff + VPEXTRD $-1, X1, AX // c4e37916c8ff + VPEXTRQ $-1, X1, AX // c4e3f916c8ff // End of tests. RET |