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| author | fanzha02 <fannie.zhang@arm.com> | 2018-03-21 10:49:24 +0000 |
|---|---|---|
| committer | Cherry Zhang <cherryyz@google.com> | 2018-04-13 15:37:21 +0000 |
| commit | 4d59b14400aff02ded4ccf62a7518266ea8fd767 (patch) | |
| tree | 8668699f7dd7fa81abc1a96e424b1e83a930d7f6 /src/cmd/asm | |
| parent | 5a91c83ce82509551d353b1b5ea25cd72b44fec3 (diff) | |
| download | go-4d59b14400aff02ded4ccf62a7518266ea8fd767.tar.xz | |
cmd/internal/obj/arm64: fix the bug of incorrect handling negative offset of LDP/STP/LDPW/STPW
The current assembler will report error when the negative offset is in
the range of [-256, 0) and is not the multiples of 4/8.
The fix introduces C_NSAUTO_8, C_NSAUTO_4 and C_NAUTO4K. C_NPAUTO
includes C_NSAUTO_8 instead of C_NSAUTO, C_NAUTO4K includes C_NSAUTO_8,
C_NSAUTO_4 and C_NSAUTO. So that assembler will encode the negative offset
that is greater than -4095 and is not the multiples of 4/8 as two instructions.
Add the test cases.
Fixed #24471
Change-Id: I42f34e3b8a9fc52c9e8b41504294271aafade639
Reviewed-on: https://go-review.googlesource.com/102635
Run-TryBot: Cherry Zhang <cherryyz@google.com>
TryBot-Result: Gobot Gobot <gobot@golang.org>
Reviewed-by: Cherry Zhang <cherryyz@google.com>
Diffstat (limited to 'src/cmd/asm')
| -rw-r--r-- | src/cmd/asm/internal/asm/testdata/arm64.s | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/src/cmd/asm/internal/asm/testdata/arm64.s b/src/cmd/asm/internal/asm/testdata/arm64.s index ec32e0ff34..b5d44ebe50 100644 --- a/src/cmd/asm/internal/asm/testdata/arm64.s +++ b/src/cmd/asm/internal/asm/testdata/arm64.s @@ -540,8 +540,12 @@ again: LDP 1024(RSP), (R1, R2) // fb031091610b40a9 LDP.W 8(RSP), (R1, R2) // e18bc0a9 LDP.P 8(RSP), (R1, R2) // e18bc0a8 + LDP -31(R0), (R1, R2) // 1b7c00d1610b40a9 + LDP -4(R0), (R1, R2) // 1b1000d1610b40a9 + LDP -8(R0), (R1, R2) // 01887fa9 LDP x(SB), (R1, R2) LDP x+8(SB), (R1, R2) + LDPW -5(R0), (R1, R2) // 1b1400d1610b4029 LDPW (R0), (R1, R2) // 01084029 LDPW 4(R0), (R1, R2) // 01884029 LDPW -4(R0), (R1, R2) // 01887f29 @@ -579,6 +583,7 @@ again: STP.W (R3, R4), 8(R5) // a39080a9 STP.P (R3, R4), 8(R5) // a39080a8 STP (R3, R4), -8(R5) // a3903fa9 + STP (R3, R4), -4(R5) // bb1000d1631300a9 STP (R3, R4), 11(R0) // 1b2c0091631300a9 STP (R3, R4), 1024(R0) // 1b001091631300a9 STP (R3, R4), (RSP) // e31300a9 @@ -595,6 +600,7 @@ again: STPW.W (R3, R4), 4(R5) // a3908029 STPW.P (R3, R4), 4(R5) // a3908028 STPW (R3, R4), -4(R5) // a3903f29 + STPW (R3, R4), -5(R5) // bb1400d163130029 STPW (R3, R4), 11(R0) // 1b2c009163130029 STPW (R3, R4), 1024(R0) // 1b00109163130029 STPW (R3, R4), (RSP) // e3130029 |