aboutsummaryrefslogtreecommitdiff
path: root/src/cmd/asm
diff options
context:
space:
mode:
authorXiaolin Zhao <zhaoxiaolin@loongson.cn>2024-04-01 15:05:45 +0800
committerabner chenc <chenguoqi@loongson.cn>2024-08-02 00:29:24 +0000
commit11dbbaffe1db00d8726215c3fa56e02d66e78de5 (patch)
treeeb0f8fbed6841999e3a08dcca5b11b1a3e7a0ea3 /src/cmd/asm
parent67c3f012cf5bfd69841c74666243281f0698e09f (diff)
downloadgo-11dbbaffe1db00d8726215c3fa56e02d66e78de5.tar.xz
cmd/internal/obj/loong64: add support for MOV{GR2FCSR/FCSR2GR/FR2CF/CF2FR} instructions
Go asm syntax example: MOVV R4, FCSR0 MOVV FCSR1, R5 MOVV F4, FCC0 MOVV FCC1, F5 Equivalent platform assembler syntax: movgr2fcsr fcsr0, r4 movfcsr2gr r5, fcsr1 movfr2cf fcc0, f4 movcf2fr f5, fcc1 Ref: https://loongson.github.io/LoongArch-Documentation/LoongArch-Vol1-EN.html This change also merges the case of floating point move instructions and add checks for the range of special registers. Change-Id: Ib08fbce83e7a31dc0ab4857bf9ba959855241d1c Reviewed-on: https://go-review.googlesource.com/c/go/+/580279 LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: abner chenc <chenguoqi@loongson.cn> Reviewed-by: Michael Knyszek <mknyszek@google.com> Reviewed-by: Cherry Mui <cherryyz@google.com>
Diffstat (limited to 'src/cmd/asm')
-rw-r--r--src/cmd/asm/internal/asm/testdata/loong64enc1.s4
1 files changed, 4 insertions, 0 deletions
diff --git a/src/cmd/asm/internal/asm/testdata/loong64enc1.s b/src/cmd/asm/internal/asm/testdata/loong64enc1.s
index bd06f72273..e648d178dd 100644
--- a/src/cmd/asm/internal/asm/testdata/loong64enc1.s
+++ b/src/cmd/asm/internal/asm/testdata/loong64enc1.s
@@ -213,6 +213,10 @@ lable2:
RDTIMEHW R4, R0 // 80640000
RDTIMED R4, R5 // 85680000
+ MOVV R4, FCSR3 // 83c01401
+ MOVV FCSR3, R4 // 64c81401
+ MOVV F4, FCC0 // 80d01401
+ MOVV FCC0, F4 // 04d41401
MOVV FCC0, R4 // 04dc1401
MOVV R4, FCC0 // 80d81401