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authorGuoqi Chen <chenguoqi@loongson.cn>2025-11-24 20:19:06 +0800
committerGopher Robot <gobot@golang.org>2025-11-26 10:40:28 -0800
commite0a4dffb0c0eff51bb5b170d4ae0492a43de153d (patch)
tree9dc48ba49d4800eeeee72831b4018fa563eb2384 /src/cmd/asm/internal
parentc0f02c11fff439cf3a99dfca34698b583bb3ce48 (diff)
downloadgo-e0a4dffb0c0eff51bb5b170d4ae0492a43de153d.tar.xz
cmd/internal/obj/loong64: add {,x}vmadd series instructions support
Go asm syntax: VMADD{B, H, W, V} V1, V2, V3 VMSUB{B, H, W, V} V1, V2, V3 XVMADD{B, H, W, V} X1, X2, X3 XVMSUB{B, H, W, V} X1, X2, X3 VMADDWEV{HB, WH, VW,QV}{,U} V1, V2, V3 VMADDWOD{HB, WH, VW,QV}{,U} V1, V2, V3 XVMADDWEV{HB, WH, VW,QV}{,U} X1, X2, X3 XVMADDWOD{HB, WH, VW,QV}{,U} X1, X2, X3 VMADDWEV{HBUB, WHUH, VWUW, QVUV} V1, V2, V3 VMADDWOD{HBUB, WHUH, VWUW, QVUV} V1, V2, V3 XVMADDWEV{HBUB, WHUH, VWUW, QVUV} X1, X2, X3 XVMADDWOD{HBUB, WHUH, VWUW, QVUV} X1, X2, X3 Equivalent platform assembler syntax: vmadd.{b,h,w,d} v3, v2, v1 vmsub.{b,h,w,d} v3, v2, v1 xvmadd.{b,h,w,d} x3, x2, x1 xvmsub.{b,h,w,d} x3, x2, x1 vmaddwev.{h.b, w.h, d.w, q.d}{,u} v3, v2, v1 vmaddwod.{h.b, w.h, d.w, q.d}{,u} v3, v2, v1 xvmaddwev.{h.b, w.h, d.w, q.d}{,u} x3, x2, x1 xvmaddwod.{h.b, w.h, d.w, q.d}{,u} x3, x2, x1 vmaddwev.{h.bu.b, d.wu.w, d.wu.w, q.du.d} v3, v2, v1 vmaddwod.{h.bu.b, d.wu.w, d.wu.w, q.du.d} v3, v2, v1 xvmaddwev.{h.bu.b, d.wu.w, d.wu.w, q.du.d} x3, x2, x1 xvmaddwod.{h.bu.b, d.wu.w, d.wu.w, q.du.d} x3, x2, x1 Change-Id: I2f4aae51045e1596d4744e525a1589586065cf8e Reviewed-on: https://go-review.googlesource.com/c/go/+/724200 Reviewed-by: Cherry Mui <cherryyz@google.com> Reviewed-by: Meidan Li <limeidan@loongson.cn> Reviewed-by: Dmitri Shuralyov <dmitshur@google.com> Reviewed-by: sophie zhao <zhaoxiaolin@loongson.cn> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Auto-Submit: abner chenc <chenguoqi@loongson.cn>
Diffstat (limited to 'src/cmd/asm/internal')
-rw-r--r--src/cmd/asm/internal/asm/testdata/loong64enc1.s72
1 files changed, 72 insertions, 0 deletions
diff --git a/src/cmd/asm/internal/asm/testdata/loong64enc1.s b/src/cmd/asm/internal/asm/testdata/loong64enc1.s
index 20fd014434..42fa505832 100644
--- a/src/cmd/asm/internal/asm/testdata/loong64enc1.s
+++ b/src/cmd/asm/internal/asm/testdata/loong64enc1.s
@@ -1163,6 +1163,78 @@ lable2:
XVSUBWODVWU X1, X2, X3 // 43043574
XVSUBWODQVU X1, X2, X3 // 43843574
+ // [X]VMADD.{B/H/W/D}, [X]VMSUB.{B/H/W/D} instructions
+ VMADDB V1, V2, V3 // 4304a870
+ VMADDH V1, V2, V3 // 4384a870
+ VMADDW V1, V2, V3 // 4304a970
+ VMADDV V1, V2, V3 // 4384a970
+ VMSUBB V1, V2, V3 // 4304aa70
+ VMSUBH V1, V2, V3 // 4384aa70
+ VMSUBW V1, V2, V3 // 4304ab70
+ VMSUBV V1, V2, V3 // 4384ab70
+ XVMADDB X1, X2, X3 // 4304a874
+ XVMADDH X1, X2, X3 // 4384a874
+ XVMADDW X1, X2, X3 // 4304a974
+ XVMADDV X1, X2, X3 // 4384a974
+ XVMSUBB X1, X2, X3 // 4304aa74
+ XVMSUBH X1, X2, X3 // 4384aa74
+ XVMSUBW X1, X2, X3 // 4304ab74
+ XVMSUBV X1, X2, X3 // 4384ab74
+
+ // [X]VMADDW{EV/OD}.{H.B/W.H/D.W/Q.D} instructions
+ VMADDWEVHB V1, V2, V3 // 4304ac70
+ VMADDWEVWH V1, V2, V3 // 4384ac70
+ VMADDWEVVW V1, V2, V3 // 4304ad70
+ VMADDWEVQV V1, V2, V3 // 4384ad70
+ VMADDWODHB V1, V2, V3 // 4304ae70
+ VMADDWODWH V1, V2, V3 // 4384ae70
+ VMADDWODVW V1, V2, V3 // 4304af70
+ VMADDWODQV V1, V2, V3 // 4384af70
+ XVMADDWEVHB X1, X2, X3 // 4304ac74
+ XVMADDWEVWH X1, X2, X3 // 4384ac74
+ XVMADDWEVVW X1, X2, X3 // 4304ad74
+ XVMADDWEVQV X1, X2, X3 // 4384ad74
+ XVMADDWODHB X1, X2, X3 // 4304ae74
+ XVMADDWODWH X1, X2, X3 // 4384ae74
+ XVMADDWODVW X1, X2, X3 // 4304af74
+ XVMADDWODQV X1, X2, X3 // 4384af74
+
+ // [X]VMADDW{EV/OD}.{H.B/W.H/D.W/Q.D}U instructions
+ VMADDWEVHBU V1, V2, V3 // 4304b470
+ VMADDWEVWHU V1, V2, V3 // 4384b470
+ VMADDWEVVWU V1, V2, V3 // 4304b570
+ VMADDWEVQVU V1, V2, V3 // 4384b570
+ VMADDWODHBU V1, V2, V3 // 4304b670
+ VMADDWODWHU V1, V2, V3 // 4384b670
+ VMADDWODVWU V1, V2, V3 // 4304b770
+ VMADDWODQVU V1, V2, V3 // 4384b770
+ XVMADDWEVHBU X1, X2, X3 // 4304b474
+ XVMADDWEVWHU X1, X2, X3 // 4384b474
+ XVMADDWEVVWU X1, X2, X3 // 4304b574
+ XVMADDWEVQVU X1, X2, X3 // 4384b574
+ XVMADDWODHBU X1, X2, X3 // 4304b674
+ XVMADDWODWHU X1, X2, X3 // 4384b674
+ XVMADDWODVWU X1, X2, X3 // 4304b774
+ XVMADDWODQVU X1, X2, X3 // 4384b774
+
+ // [X]VMADDW{EV/OD}.{H.BU.B/W.HU.H/D.WU.W/Q.DU.D} instructions
+ VMADDWEVHBUB V1, V2, V3 // 4304bc70
+ VMADDWEVWHUH V1, V2, V3 // 4384bc70
+ VMADDWEVVWUW V1, V2, V3 // 4304bd70
+ VMADDWEVQVUV V1, V2, V3 // 4384bd70
+ VMADDWODHBUB V1, V2, V3 // 4304be70
+ VMADDWODWHUH V1, V2, V3 // 4384be70
+ VMADDWODVWUW V1, V2, V3 // 4304bf70
+ VMADDWODQVUV V1, V2, V3 // 4384bf70
+ XVMADDWEVHBUB X1, X2, X3 // 4304bc74
+ XVMADDWEVWHUH X1, X2, X3 // 4384bc74
+ XVMADDWEVVWUW X1, X2, X3 // 4304bd74
+ XVMADDWEVQVUV X1, X2, X3 // 4384bd74
+ XVMADDWODHBUB X1, X2, X3 // 4304be74
+ XVMADDWODWHUH X1, X2, X3 // 4384be74
+ XVMADDWODVWUW X1, X2, X3 // 4304bf74
+ XVMADDWODQVUV X1, X2, X3 // 4384bf74
+
// [X]VSHUF4I.{B/H/W/D} instructions
VSHUF4IB $0, V2, V1 // 41009073
VSHUF4IB $16, V2, V1 // 41409073