diff options
| author | Jayanth Krishnamurthy jayanth.krishnamurthy@ibm.com <jayanth.krishnamurthy@ibm.com> | 2024-10-29 16:11:37 -0500 |
|---|---|---|
| committer | Gopher Robot <gobot@golang.org> | 2024-11-21 18:27:17 +0000 |
| commit | 7403a6a122a28f715448d4a9b360efe2df15423d (patch) | |
| tree | 176a00440dc874e51ae7e73c331ab5c5ae29e272 /src/cmd/asm/internal | |
| parent | c37d9a0f9313ff2936b1b0b82476416e6cb03c62 (diff) | |
| download | go-7403a6a122a28f715448d4a9b360efe2df15423d.tar.xz | |
cmd/internal/obj/ppc64: support for decimal floating point instructions
1. Support for decimal arithmetic quad instructions of powerpc: DADDQ, DSUBQ, DMULQ
and DDIVQ.
2. Support for decimal compare ordered, unordered, quad instructions of powerpc:
DCMPU, DCMPO, DCMPUQ, and DCMPOQ.
Change-Id: I32a15a7f0a127b022b1f43d376e0ab0f7e9dd108
Cq-Include-Trybots: luci.golang.try:gotip-linux-ppc64_power10,gotip-linux-ppc64_power8,gotip-linux-ppc64le_power8,gotip-linux-ppc64le_power9,gotip-linux-ppc64le_power10
Reviewed-on: https://go-review.googlesource.com/c/go/+/623036
LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
Auto-Submit: Paul Murphy <murp@ibm.com>
Reviewed-by: Dmitri Shuralyov <dmitshur@google.com>
Reviewed-by: Paul Murphy <murp@ibm.com>
Reviewed-by: Cherry Mui <cherryyz@google.com>
Diffstat (limited to 'src/cmd/asm/internal')
| -rw-r--r-- | src/cmd/asm/internal/arch/ppc64.go | 2 | ||||
| -rw-r--r-- | src/cmd/asm/internal/asm/testdata/ppc64.s | 26 |
2 files changed, 22 insertions, 6 deletions
diff --git a/src/cmd/asm/internal/arch/ppc64.go b/src/cmd/asm/internal/arch/ppc64.go index c13652e960..4f3f83e751 100644 --- a/src/cmd/asm/internal/arch/ppc64.go +++ b/src/cmd/asm/internal/arch/ppc64.go @@ -25,7 +25,7 @@ func jumpPPC64(word string) bool { // one of the CMP instructions that require special handling. func IsPPC64CMP(op obj.As) bool { switch op { - case ppc64.ACMP, ppc64.ACMPU, ppc64.ACMPW, ppc64.ACMPWU, ppc64.AFCMPO, ppc64.AFCMPU: + case ppc64.ACMP, ppc64.ACMPU, ppc64.ACMPW, ppc64.ACMPWU, ppc64.AFCMPO, ppc64.AFCMPU, ppc64.ADCMPO, ppc64.ADCMPU, ppc64.ADCMPOQ, ppc64.ADCMPUQ: return true } return false diff --git a/src/cmd/asm/internal/asm/testdata/ppc64.s b/src/cmd/asm/internal/asm/testdata/ppc64.s index f25072a17e..8e9b8c4745 100644 --- a/src/cmd/asm/internal/asm/testdata/ppc64.s +++ b/src/cmd/asm/internal/asm/testdata/ppc64.s @@ -692,11 +692,15 @@ TEXT asmtest(SB),DUPOK|NOSPLIT,$0 FADDS F1, F2, F3 // ec62082a DADD F1, F2 // ec420804 DADD F1, F2, F3 // ec620804 + DADDQ F2, F4 // fc841004 + DADDQ F2, F4, F6 // fcc41004 FADDSCC F1, F2, F3 // ec62082b FSUB F1, F2 // fc420828 FSUB F1, F2, F3 // fc620828 DSUB F1, F2 // ec420c04 - DSUB F1, F2, F3 // ec620c04 + DSUB F1, F2, F3 // ec620c04 + DSUBQ F2, F4 // fc841404 + DSUBQ F2, F4, F6 // fcc41404 FSUBCC F1, F2, F3 // fc620829 FSUBS F1, F2 // ec420828 FSUBS F1, F2, F3 // ec620828 @@ -705,7 +709,9 @@ TEXT asmtest(SB),DUPOK|NOSPLIT,$0 FMUL F1, F2 // fc420072 FMUL F1, F2, F3 // fc620072 DMUL F1, F2 // ec420044 - DMUL F1, F2, F3 // ec620044 + DMUL F1, F2, F3 // ec620044 + DMULQ F2, F4 // fc8400c4 + DMULQ F2, F4, F6 // fcc400c4 FMULCC F1, F2, F3 // fc620073 FMULS F1, F2 // ec420072 FMULS F1, F2, F3 // ec620072 @@ -713,7 +719,9 @@ TEXT asmtest(SB),DUPOK|NOSPLIT,$0 FDIV F1, F2 // fc420824 FDIV F1, F2, F3 // fc620824 DDIV F1, F2 // ec420c44 - DDIV F1, F2, F3 // ec620c44 + DDIV F1, F2, F3 // ec620c44 + DDIVQ F2, F4 // fc841444 + DDIVQ F2, F4, F6 // fcc41444 FDIVCC F1, F2, F3 // fc620825 FDIVS F1, F2 // ec420824 FDIVS F1, F2, F3 // ec620824 @@ -780,9 +788,17 @@ TEXT asmtest(SB),DUPOK|NOSPLIT,$0 FCPSGN F1, F2 // fc420810 FCPSGNCC F1, F2 // fc420811 FCMPO F1, F2 // fc011040 - FCMPO F1, F2, CR0 // FCMPO F1,CR0,F2 // fc011040 + FCMPO F1, F2, CR0 // FCMPO F1,CR0,F2 // fc011040 FCMPU F1, F2 // fc011000 - FCMPU F1, F2, CR0 // FCMPU F1,CR0,F2 // fc011000 + FCMPU F1, F2, CR0 // FCMPU F1,CR0,F2 // fc011000 + DCMPO F1, F2 // ec011104 + DCMPO F1, F2, CR0 // DCMPO F1,CR0,F2 // ec011104 + DCMPOQ F2, F4 // fc022104 + DCMPOQ F2,F4, CR0 // DCMPOQ F2,CR0,F4 // fc022104 + DCMPU F1, F2 // ec011504 + DCMPU F1, F2, CR0 // DCMPU F1,CR0,F2 // ec011504 + DCMPUQ F2, F4 // fc022504 + DCMPUQ F2,F4, CR0 // DCMPUQ F2,CR0,F4 // fc022504 LVX (R3)(R4), V1 // 7c2418ce LVX (R3)(R0), V1 // 7c2018ce LVX (R3), V1 // 7c2018ce |