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| author | Joel Sing <joel@sing.id.au> | 2021-03-19 14:09:59 +0000 |
|---|---|---|
| committer | Joel Sing <joel@sing.id.au> | 2021-09-04 10:58:11 +0000 |
| commit | 5ec298d7b07c4a51149f57dece41f0e9c0d701c4 (patch) | |
| tree | a78d76adf847be7eac8b576b6115fa64b23d2248 /src/cmd/asm/internal | |
| parent | 0b66310924ace48c15a3140843576d5b069762de (diff) | |
| download | go-5ec298d7b07c4a51149f57dece41f0e9c0d701c4.tar.xz | |
cmd/internal/obj/riscv: avoid obj.Prog rewriting for memory loads
Rather than rewriting the obj.Prog for a MOV pseudo-instruction targeting
a memory to register load, generate the appropriate machine instruction
sequence directly.
Change-Id: I4c7292ba00f576ec71d4842b6ff27a8ce6db0650
Reviewed-on: https://go-review.googlesource.com/c/go/+/344454
Trust: Joel Sing <joel@sing.id.au>
Reviewed-by: Cherry Mui <cherryyz@google.com>
Diffstat (limited to 'src/cmd/asm/internal')
| -rw-r--r-- | src/cmd/asm/internal/asm/testdata/riscv64.s | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/cmd/asm/internal/asm/testdata/riscv64.s b/src/cmd/asm/internal/asm/testdata/riscv64.s index b22d1a7e37..6f37a940c7 100644 --- a/src/cmd/asm/internal/asm/testdata/riscv64.s +++ b/src/cmd/asm/internal/asm/testdata/riscv64.s @@ -285,8 +285,8 @@ start: MOV $2048, X5 // b71200009b820280 MOV $-2049, X5 // b7f2ffff9b82f27f - // Converted to load of symbol. - MOV $4294967296, X5 // 97020000 + // Converted to load of symbol (AUIPC + LD) + MOV $4294967296, X5 // 9702000083b20200 MOV (X5), X6 // 03b30200 MOV 4(X5), X6 // 03b34200 |