diff options
| author | Joel Sing <joel@sing.id.au> | 2020-03-03 03:41:43 +1100 |
|---|---|---|
| committer | Joel Sing <joel@sing.id.au> | 2020-03-15 08:15:09 +0000 |
| commit | 25da2ea72c18a63f5efdb7c506669aa733693bea (patch) | |
| tree | df3bf3e98f2350bd057bcb74af29e00cf355e3ba /src/cmd/asm/internal | |
| parent | dc3255391a59474eda08e71eaf8090753b0a84db (diff) | |
| download | go-25da2ea72c18a63f5efdb7c506669aa733693bea.tar.xz | |
cmd/internal/obj/riscv: add NEG/NEGW pseudo-instructions
Provide NEG/NEGW pseudo-instructions, which translate to SUB/SUBW with the
zero register as a source.
Change-Id: I2c1ec1e75611c234c5ee8e39390dd188f8e42bae
Reviewed-on: https://go-review.googlesource.com/c/go/+/221689
Reviewed-by: Cherry Zhang <cherryyz@google.com>
Diffstat (limited to 'src/cmd/asm/internal')
| -rw-r--r-- | src/cmd/asm/internal/asm/testdata/riscvenc.s | 8 |
1 files changed, 7 insertions, 1 deletions
diff --git a/src/cmd/asm/internal/asm/testdata/riscvenc.s b/src/cmd/asm/internal/asm/testdata/riscvenc.s index 6ccac42d68..74bc43d727 100644 --- a/src/cmd/asm/internal/asm/testdata/riscvenc.s +++ b/src/cmd/asm/internal/asm/testdata/riscvenc.s @@ -309,10 +309,16 @@ start: NOT X5 // 93c2f2ff NOT X5, X6 // 13c3f2ff + // NEG/NEGW pseudo-instructions + NEG X5 // b3025040 + NEG X5, X6 // 33035040 + NEGW X5 // bb025040 + NEGW X5, X6 // 3b035040 + // These jumps can get printed as jumps to 2 because they go to the // second instruction in the function (the first instruction is an // invisible stack pointer adjustment). - JMP start // JMP 2 // 6ff01fc6 + JMP start // JMP 2 // 6ff01fc5 JMP (X5) // 67800200 JMP 4(X5) // 67804200 |