diff options
| author | Joel Sing <joel@sing.id.au> | 2020-02-21 02:50:57 +1100 |
|---|---|---|
| committer | Joel Sing <joel@sing.id.au> | 2020-03-15 08:13:28 +0000 |
| commit | 10635921e511ef82b5eabe98928e42901fd3f822 (patch) | |
| tree | 5bc17d9acd5552e58d2659a060f2f8473b5236a4 /src/cmd/asm/internal | |
| parent | 85a8526a7e8d12a31f2f1d9ebcec2841a27dc493 (diff) | |
| download | go-10635921e511ef82b5eabe98928e42901fd3f822.tar.xz | |
cmd/asm,cmd/internal/obj/riscv: add atomic memory operation instructions
Use instructions in place of currently used defines.
Updates #36765
Change-Id: I00bb59e77b1aace549d7857cc9721ba2cb4ac6ca
Reviewed-on: https://go-review.googlesource.com/c/go/+/220541
Reviewed-by: Cherry Zhang <cherryyz@google.com>
Diffstat (limited to 'src/cmd/asm/internal')
| -rw-r--r-- | src/cmd/asm/internal/arch/riscv64.go | 5 | ||||
| -rw-r--r-- | src/cmd/asm/internal/asm/testdata/riscvenc.s | 22 |
2 files changed, 25 insertions, 2 deletions
diff --git a/src/cmd/asm/internal/arch/riscv64.go b/src/cmd/asm/internal/arch/riscv64.go index 1b0cccec46..27a66c5e63 100644 --- a/src/cmd/asm/internal/arch/riscv64.go +++ b/src/cmd/asm/internal/arch/riscv64.go @@ -18,7 +18,10 @@ import ( // handling. func IsRISCV64AMO(op obj.As) bool { switch op { - case riscv.ASCW, riscv.ASCD: + case riscv.ASCW, riscv.ASCD, riscv.AAMOSWAPW, riscv.AAMOSWAPD, riscv.AAMOADDW, riscv.AAMOADDD, + riscv.AAMOANDW, riscv.AAMOANDD, riscv.AAMOORW, riscv.AAMOORD, riscv.AAMOXORW, riscv.AAMOXORD, + riscv.AAMOMINW, riscv.AAMOMIND, riscv.AAMOMINUW, riscv.AAMOMINUD, + riscv.AAMOMAXW, riscv.AAMOMAXD, riscv.AAMOMAXUW, riscv.AAMOMAXUD: return true } return false diff --git a/src/cmd/asm/internal/asm/testdata/riscvenc.s b/src/cmd/asm/internal/asm/testdata/riscvenc.s index 1327505e2a..aae862628d 100644 --- a/src/cmd/asm/internal/asm/testdata/riscvenc.s +++ b/src/cmd/asm/internal/asm/testdata/riscvenc.s @@ -163,6 +163,26 @@ start: SCW X5, (X6), X7 // af23531c SCD X5, (X6), X7 // af33531c + // 8.3: Atomic Memory Operations + AMOSWAPW X5, (X6), X7 // af23530c + AMOSWAPD X5, (X6), X7 // af33530c + AMOADDW X5, (X6), X7 // af235304 + AMOADDD X5, (X6), X7 // af335304 + AMOANDW X5, (X6), X7 // af235364 + AMOANDD X5, (X6), X7 // af335364 + AMOORW X5, (X6), X7 // af235344 + AMOORD X5, (X6), X7 // af335344 + AMOXORW X5, (X6), X7 // af235324 + AMOXORD X5, (X6), X7 // af335324 + AMOMAXW X5, (X6), X7 // af2353a4 + AMOMAXD X5, (X6), X7 // af3353a4 + AMOMAXUW X5, (X6), X7 // af2353e4 + AMOMAXUD X5, (X6), X7 // af3353e4 + AMOMINW X5, (X6), X7 // af235384 + AMOMIND X5, (X6), X7 // af335384 + AMOMINUW X5, (X6), X7 // af2353c4 + AMOMINUD X5, (X6), X7 // af3353c4 + // 10.1: Base Counters and Timers RDCYCLE X5 // f32200c0 RDTIME X5 // f32210c0 @@ -282,7 +302,7 @@ start: // These jumps can get printed as jumps to 2 because they go to the // second instruction in the function (the first instruction is an // invisible stack pointer adjustment). - JMP start // JMP 2 // 6ff09fcb + JMP start // JMP 2 // 6ff01fc7 JMP (X5) // 67800200 JMP 4(X5) // 67804200 |