diff options
| author | erifan01 <eric.fang@arm.com> | 2018-01-26 10:18:50 +0000 |
|---|---|---|
| committer | Brad Fitzpatrick <bradfitz@golang.org> | 2018-02-22 03:55:53 +0000 |
| commit | f5de42001df2e61233c7ec7bbbd014bbaeaee242 (patch) | |
| tree | 639d5fb87f8623a636a81d30c86628ba05127aa2 /src/cmd/asm/internal/arch/arm64.go | |
| parent | c18ff1846592194a6a894f26f782e25b816ae73e (diff) | |
| download | go-f5de42001df2e61233c7ec7bbbd014bbaeaee242.tar.xz | |
cmd/asm: add arm64 instructions for math optimization
Add arm64 HW instructions FMADDD, FMADDS, FMSUBD, FMSUBS, FNMADDD, FNMADDS,
FNMSUBD, FNMSUBS, VFMLA, VFMLS, VMOV (element) for math optimization.
Add check on register element index and test cases.
Change-Id: Ice07c50b1a02d488ad2cde2a4e8aea93f3e3afff
Reviewed-on: https://go-review.googlesource.com/90876
Reviewed-by: Cherry Zhang <cherryyz@google.com>
Diffstat (limited to 'src/cmd/asm/internal/arch/arm64.go')
| -rw-r--r-- | src/cmd/asm/internal/arch/arm64.go | 21 |
1 files changed, 21 insertions, 0 deletions
diff --git a/src/cmd/asm/internal/arch/arm64.go b/src/cmd/asm/internal/arch/arm64.go index 524a503472..10458b01a0 100644 --- a/src/cmd/asm/internal/arch/arm64.go +++ b/src/cmd/asm/internal/arch/arm64.go @@ -178,18 +178,39 @@ func ARM64RegisterExtension(a *obj.Addr, ext string, reg, num int16, isAmount, i a.Reg = arm64.REG_SXTX + (reg & 31) + int16(num<<5) a.Offset = int64(((rm & 31) << 16) | (7 << 13) | (uint32(num) << 10)) case "B8": + if isIndex { + return errors.New("invalid register extension") + } a.Reg = arm64.REG_ARNG + (reg & 31) + ((arm64.ARNG_8B & 15) << 5) case "B16": + if isIndex { + return errors.New("invalid register extension") + } a.Reg = arm64.REG_ARNG + (reg & 31) + ((arm64.ARNG_16B & 15) << 5) case "H4": + if isIndex { + return errors.New("invalid register extension") + } a.Reg = arm64.REG_ARNG + (reg & 31) + ((arm64.ARNG_4H & 15) << 5) case "H8": + if isIndex { + return errors.New("invalid register extension") + } a.Reg = arm64.REG_ARNG + (reg & 31) + ((arm64.ARNG_8H & 15) << 5) case "S2": + if isIndex { + return errors.New("invalid register extension") + } a.Reg = arm64.REG_ARNG + (reg & 31) + ((arm64.ARNG_2S & 15) << 5) case "S4": + if isIndex { + return errors.New("invalid register extension") + } a.Reg = arm64.REG_ARNG + (reg & 31) + ((arm64.ARNG_4S & 15) << 5) case "D2": + if isIndex { + return errors.New("invalid register extension") + } a.Reg = arm64.REG_ARNG + (reg & 31) + ((arm64.ARNG_2D & 15) << 5) case "B": if !isIndex { |