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| author | Lucio De Re <lucio.dere@gmail.com> | 2013-08-29 14:41:01 +0200 |
|---|---|---|
| committer | Rémy Oudompheng <oudomphe@phare.normalesup.org> | 2013-08-29 14:41:01 +0200 |
| commit | bf58d209992395f8c30c8554b2d04dc4e4ce128f (patch) | |
| tree | bce266bfd36415c4dc8763b35417c11ca7f6238d | |
| parent | 66c8935f732db28632b75aea456c682487febf15 (diff) | |
| download | go-bf58d209992395f8c30c8554b2d04dc4e4ce128f.tar.xz | |
cmd/8g: add descriptions for some missing instructions.
These instructions are emitted when GO386=387 or the target
i386 CPU does not have SSE2 capabilities.
Fixes #6215.
R=golang-dev, remyoudompheng
CC=golang-dev
https://golang.org/cl/12812045
| -rw-r--r-- | src/cmd/8g/prog.c | 16 |
1 files changed, 13 insertions, 3 deletions
diff --git a/src/cmd/8g/prog.c b/src/cmd/8g/prog.c index 5fded770ea..14f197b6ab 100644 --- a/src/cmd/8g/prog.c +++ b/src/cmd/8g/prog.c @@ -95,8 +95,10 @@ static ProgInfo progtable[ALAST] = { [ADIVSD]= {SizeD | LeftRead | RightRdwr}, [ADIVSS]= {SizeF | LeftRead | RightRdwr}, - [AFLDCW]= {SizeW | LeftAddr }, - [AFSTCW]= {SizeW | RightAddr }, + [AFLDCW]= {SizeW | LeftAddr}, + [AFSTCW]= {SizeW | RightAddr}, + + [AFSTSW]= {SizeW | RightAddr | RightWrite}, [AFADDD]= {SizeD | LeftAddr | RightRdwr}, [AFADDDP]= {SizeD | LeftAddr | RightRdwr}, @@ -111,9 +113,15 @@ static ProgInfo progtable[ALAST] = { [AFCHS]= {SizeD | RightRdwr}, // also SizeF - [AFDIVD]= {SizeD | LeftAddr | RightRdwr}, [AFDIVDP]= {SizeD | LeftAddr | RightRdwr}, [AFDIVF]= {SizeF | LeftAddr | RightRdwr}, + [AFDIVD]= {SizeD | LeftAddr | RightRdwr}, + + [AFDIVRDP]= {SizeD | LeftAddr | RightRdwr}, + [AFDIVRF]= {SizeF | LeftAddr | RightRdwr}, + [AFDIVRD]= {SizeD | LeftAddr | RightRdwr}, + + [AFXCHD]= {SizeD | LeftRdwr | RightRdwr}, [AFSUBD]= {SizeD | LeftAddr | RightRdwr}, [AFSUBDP]= {SizeD | LeftAddr | RightRdwr}, @@ -235,6 +243,8 @@ static ProgInfo progtable[ALAST] = { [ARORL]= {SizeL | LeftRead | RightRdwr | ShiftCX | SetCarry}, [ARORW]= {SizeW | LeftRead | RightRdwr | ShiftCX | SetCarry}, + [ASAHF]= {OK, AX, AX}, + [ASALB]= {SizeB | LeftRead | RightRdwr | ShiftCX | SetCarry}, [ASALL]= {SizeL | LeftRead | RightRdwr | ShiftCX | SetCarry}, [ASALW]= {SizeW | LeftRead | RightRdwr | ShiftCX | SetCarry}, |