From f6b47110952ea1c19cbdc040489c83f306c36e73 Mon Sep 17 00:00:00 2001 From: David Chase Date: Thu, 9 Oct 2025 15:12:47 -0400 Subject: [dev.simd] cmd/compile, simd: add rewrite to convert logical expression trees into TERNLOG instructions includes tests of both rewrite application and rewrite correctness Change-Id: I7983ccf87a8408af95bb6c447cb22f01beda9f61 Reviewed-on: https://go-review.googlesource.com/c/go/+/710697 LUCI-TryBot-Result: Go LUCI Reviewed-by: Junyang Shao --- test/simd.go | 12 +++++++++++- 1 file changed, 11 insertions(+), 1 deletion(-) (limited to 'test') diff --git a/test/simd.go b/test/simd.go index b1695fa514..32ed70d39a 100644 --- a/test/simd.go +++ b/test/simd.go @@ -1,4 +1,4 @@ -// errorcheck -0 -d=ssa/cpufeatures/debug=1 +// errorcheck -0 -d=ssa/cpufeatures/debug=1,ssa/rewrite_tern/debug=1 //go:build goexperiment.simd && amd64 @@ -95,3 +95,13 @@ b: c: println("c") } + +func ternRewrite(m, w, x, y, z simd.Int32x16) (t0, t1, t2 simd.Int32x16) { + if !simd.HasAVX512() { // ERROR "has features avx[+]avx2[+]avx512$" + return // ERROR "has features avx[+]avx2[+]avx512$" // all blocks have it because of the vector size + } + t0 = w.Xor(y).Xor(z) // ERROR "Rewriting.*ternInt" + t1 = m.And(w.Xor(y).Xor(z.Not())) // ERROR "Rewriting.*ternInt" + t2 = x.Xor(y).Xor(z).And(x.Xor(y).Xor(z.Not())) // ERROR "Rewriting.*ternInt" + return // ERROR "has features avx[+]avx2[+]avx512$" +} -- cgit v1.3-5-g9baa