From e6c2e12c63db5b24724db873009373af413cd1ea Mon Sep 17 00:00:00 2001 From: Joel Sing Date: Mon, 19 Aug 2024 23:57:56 +1000 Subject: cmd/compile/internal/ssa: optimise more branches with zero on riscv64 Optimise more branches with zero on riscv64. In particular, BLTU with zero occurs with IsInBounds checks for index zero. This currently results in two instructions and requires an additional register: li t2, 0 bltu t2, t1, 0x174b4 This is equivalent to checking if the bounds is not equal to zero. With this change: bnez t1, 0x174c0 This removes more than 500 instructions from the Go binary on riscv64. Change-Id: I6cd861d853e3ef270bd46dacecdfaa205b1c4644 Reviewed-on: https://go-review.googlesource.com/c/go/+/606715 LUCI-TryBot-Result: Go LUCI Reviewed-by: Meng Zhuo Reviewed-by: Cherry Mui Reviewed-by: Dmitri Shuralyov --- test/codegen/compare_and_branch.go | 10 ++++++++++ 1 file changed, 10 insertions(+) (limited to 'test/codegen') diff --git a/test/codegen/compare_and_branch.go b/test/codegen/compare_and_branch.go index c121f1d2cc..759dd26358 100644 --- a/test/codegen/compare_and_branch.go +++ b/test/codegen/compare_and_branch.go @@ -241,4 +241,14 @@ func ui64x0(x chan uint64) { for <-x < 1 { dummy() } + + // riscv64:"BNEZ" + for 0 < <-x { + dummy() + } + + // riscv64:"BEQZ" + for 0 >= <-x { + dummy() + } } -- cgit v1.3