From 85a8d25d535a9b70f6c908e44f8558c207366ff1 Mon Sep 17 00:00:00 2001 From: isharipo Date: Fri, 9 Mar 2018 23:09:46 +0300 Subject: cmd/compile/internal/ssa: emit IMUL3{L/Q} for MUL{L/Q}const on x86 cmd/asm now supports three-operand form of IMUL, so instead of using IMUL with resultInArg0, emit IMUL3 instruction. This results in less redundant MOVs where SSA assigns different registers to input[0] and dst arguments. Note: these have exactly the same encoding when reg0=reg1: IMUL3x $const, reg0, reg1 IMULx $const, reg Two-operand IMULx is like a crippled IMUL3x, with dst fixed to input[0]. This is why we don't bother to generate IMULx for the case where dst is the same as input[0]. Change-Id: I4becda475b3dffdd07b6fdf1c75bacc82af654e4 Reviewed-on: https://go-review.googlesource.com/99656 Run-TryBot: Iskander Sharipov TryBot-Result: Gobot Gobot Reviewed-by: Giovanni Bajo Reviewed-by: Keith Randall --- test/codegen/arithmetic.go | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) (limited to 'test/codegen/arithmetic.go') diff --git a/test/codegen/arithmetic.go b/test/codegen/arithmetic.go index eecb101395..1294cfffd9 100644 --- a/test/codegen/arithmetic.go +++ b/test/codegen/arithmetic.go @@ -30,14 +30,14 @@ func Pow2Muls(n1, n2 int) (int, int) { // ------------------ // func MergeMuls1(n int) int { - // amd64:"IMULQ\t[$]46" - // 386:"IMULL\t[$]46" + // amd64:"IMUL3Q\t[$]46" + // 386:"IMUL3L\t[$]46" return 15*n + 31*n // 46n } func MergeMuls2(n int) int { - // amd64:"IMULQ\t[$]23","ADDQ\t[$]29" - // 386:"IMULL\t[$]23","ADDL\t[$]29" + // amd64:"IMUL3Q\t[$]23","ADDQ\t[$]29" + // 386:"IMUL3L\t[$]23","ADDL\t[$]29" return 5*n + 7*(n+1) + 11*(n+2) // 23n + 29 } @@ -48,8 +48,8 @@ func MergeMuls3(a, n int) int { } func MergeMuls4(n int) int { - // amd64:"IMULQ\t[$]14" - // 386:"IMULL\t[$]14" + // amd64:"IMUL3Q\t[$]14" + // 386:"IMUL3L\t[$]14" return 23*n - 9*n // 14n } -- cgit v1.3-5-g45d5