From f38e968abafde345fa470cb14d55b6f092af569f Mon Sep 17 00:00:00 2001 From: Cherry Mui Date: Mon, 8 Dec 2025 12:14:24 -0500 Subject: [dev.simd] cmd/compile: zero only low 128-bit of X15 Zeroing the upper part of X15 may make the CPU think it is "dirty" and slow down SSE operations. For now, just not zeroing the upper part, and construct a zero value on the fly if we need a 256- or 512-bit zero value. Maybe VZEROUPPER works better than explicitly zeroing X15, but we need to evaluate. Long term, we probably want to move more things from SSE to AVX. This essentially undoes CL 698237 and CL 698238, except keeping using X15 for 128-bit zeroing for SIMD. Change-Id: I1564e6332c4c57f9721397c92c7c734c5497534c Reviewed-on: https://go-review.googlesource.com/c/go/+/728240 LUCI-TryBot-Result: Go LUCI Reviewed-by: David Chase --- src/runtime/sys_linux_amd64.s | 10 ---------- 1 file changed, 10 deletions(-) (limited to 'src/runtime/sys_linux_amd64.s') diff --git a/src/runtime/sys_linux_amd64.s b/src/runtime/sys_linux_amd64.s index 618553b196..878f834748 100644 --- a/src/runtime/sys_linux_amd64.s +++ b/src/runtime/sys_linux_amd64.s @@ -352,11 +352,6 @@ TEXT runtime·sigtramp(SB),NOSPLIT|TOPFRAME|NOFRAME,$0 get_tls(R12) MOVQ g(R12), R14 PXOR X15, X15 -#ifdef GOEXPERIMENT_simd - CMPB internal∕cpu·X86+const_offsetX86HasAVX(SB), $1 - JNE 2(PC) - VXORPS X15, X15, X15 -#endif // Reserve space for spill slots. NOP SP // disable vet stack checking @@ -382,11 +377,6 @@ TEXT runtime·sigprofNonGoWrapper<>(SB),NOSPLIT|NOFRAME,$0 get_tls(R12) MOVQ g(R12), R14 PXOR X15, X15 -#ifdef GOEXPERIMENT_simd - CMPB internal∕cpu·X86+const_offsetX86HasAVX(SB), $1 - JNE 2(PC) - VXORPS X15, X15, X15 -#endif // Reserve space for spill slots. NOP SP // disable vet stack checking -- cgit v1.3