From 5f0fca1475e042a6e85f81ff6db676ec18805041 Mon Sep 17 00:00:00 2001
From: Jonathan Swinney <jswinney@amazon.com>
Date: Mon, 2 Nov 2020 16:36:10 +0000
Subject: cmd/asm: rename arm64 instructions LDANDx to LDCLRx

The LDANDx instructions were misleading because they correspond to the
mnemonic LDCLRx as defined in the Arm Architecture Reference Manual for
Armv8. This changes the assembler to use the same mnemonic as the GNU
assembler and the manual.

The instruction has the form:

LDCLRx Rs, (Rb), Rt: *Rb -> Rt, Rs AND NOT(*Rb) -> *Rb

Change-Id: I94ae003e99e817209bba1afe960e612bf3a0b410
Reviewed-on: https://go-review.googlesource.com/c/go/+/267138
Reviewed-by: Cherry Zhang <cherryyz@google.com>
Reviewed-by: fannie zhang <Fannie.Zhang@arm.com>
Run-TryBot: Cherry Zhang <cherryyz@google.com>
TryBot-Result: Go Bot <gobot@golang.org>
Trust: fannie zhang <Fannie.Zhang@arm.com>
---
 src/cmd/internal/obj/arm64/a.out.go  | 32 ++++++++++++++++----------------
 src/cmd/internal/obj/arm64/anames.go | 32 ++++++++++++++++----------------
 src/cmd/internal/obj/arm64/asm7.go   | 34 +++++++++++++++++-----------------
 3 files changed, 49 insertions(+), 49 deletions(-)

(limited to 'src/cmd/internal/obj')

diff --git a/src/cmd/internal/obj/arm64/a.out.go b/src/cmd/internal/obj/arm64/a.out.go
index 5844b71ca7..1d1bea505c 100644
--- a/src/cmd/internal/obj/arm64/a.out.go
+++ b/src/cmd/internal/obj/arm64/a.out.go
@@ -617,22 +617,6 @@ const (
 	ALDADDLD
 	ALDADDLH
 	ALDADDLW
-	ALDANDAB
-	ALDANDAD
-	ALDANDAH
-	ALDANDAW
-	ALDANDALB
-	ALDANDALD
-	ALDANDALH
-	ALDANDALW
-	ALDANDB
-	ALDANDD
-	ALDANDH
-	ALDANDW
-	ALDANDLB
-	ALDANDLD
-	ALDANDLH
-	ALDANDLW
 	ALDAR
 	ALDARB
 	ALDARH
@@ -643,6 +627,22 @@ const (
 	ALDAXRB
 	ALDAXRH
 	ALDAXRW
+	ALDCLRAB
+	ALDCLRAD
+	ALDCLRAH
+	ALDCLRAW
+	ALDCLRALB
+	ALDCLRALD
+	ALDCLRALH
+	ALDCLRALW
+	ALDCLRB
+	ALDCLRD
+	ALDCLRH
+	ALDCLRW
+	ALDCLRLB
+	ALDCLRLD
+	ALDCLRLH
+	ALDCLRLW
 	ALDEORAB
 	ALDEORAD
 	ALDEORAH
diff --git a/src/cmd/internal/obj/arm64/anames.go b/src/cmd/internal/obj/arm64/anames.go
index fb216f9a94..a98f8c7ed5 100644
--- a/src/cmd/internal/obj/arm64/anames.go
+++ b/src/cmd/internal/obj/arm64/anames.go
@@ -111,22 +111,6 @@ var Anames = []string{
 	"LDADDLD",
 	"LDADDLH",
 	"LDADDLW",
-	"LDANDAB",
-	"LDANDAD",
-	"LDANDAH",
-	"LDANDAW",
-	"LDANDALB",
-	"LDANDALD",
-	"LDANDALH",
-	"LDANDALW",
-	"LDANDB",
-	"LDANDD",
-	"LDANDH",
-	"LDANDW",
-	"LDANDLB",
-	"LDANDLD",
-	"LDANDLH",
-	"LDANDLW",
 	"LDAR",
 	"LDARB",
 	"LDARH",
@@ -137,6 +121,22 @@ var Anames = []string{
 	"LDAXRB",
 	"LDAXRH",
 	"LDAXRW",
+	"LDCLRAB",
+	"LDCLRAD",
+	"LDCLRAH",
+	"LDCLRAW",
+	"LDCLRALB",
+	"LDCLRALD",
+	"LDCLRALH",
+	"LDCLRALW",
+	"LDCLRB",
+	"LDCLRD",
+	"LDCLRH",
+	"LDCLRW",
+	"LDCLRLB",
+	"LDCLRLD",
+	"LDCLRLH",
+	"LDCLRLW",
 	"LDEORAB",
 	"LDEORAD",
 	"LDEORAH",
diff --git a/src/cmd/internal/obj/arm64/asm7.go b/src/cmd/internal/obj/arm64/asm7.go
index 4fc62d5c7f..1a359f1921 100644
--- a/src/cmd/internal/obj/arm64/asm7.go
+++ b/src/cmd/internal/obj/arm64/asm7.go
@@ -107,22 +107,22 @@ var atomicLDADD = map[obj.As]uint32{
 	ALDADDLW:  2<<30 | 0x1c3<<21 | 0x00<<10,
 	ALDADDLH:  1<<30 | 0x1c3<<21 | 0x00<<10,
 	ALDADDLB:  0<<30 | 0x1c3<<21 | 0x00<<10,
-	ALDANDAD:  3<<30 | 0x1c5<<21 | 0x04<<10,
-	ALDANDAW:  2<<30 | 0x1c5<<21 | 0x04<<10,
-	ALDANDAH:  1<<30 | 0x1c5<<21 | 0x04<<10,
-	ALDANDAB:  0<<30 | 0x1c5<<21 | 0x04<<10,
-	ALDANDALD: 3<<30 | 0x1c7<<21 | 0x04<<10,
-	ALDANDALW: 2<<30 | 0x1c7<<21 | 0x04<<10,
-	ALDANDALH: 1<<30 | 0x1c7<<21 | 0x04<<10,
-	ALDANDALB: 0<<30 | 0x1c7<<21 | 0x04<<10,
-	ALDANDD:   3<<30 | 0x1c1<<21 | 0x04<<10,
-	ALDANDW:   2<<30 | 0x1c1<<21 | 0x04<<10,
-	ALDANDH:   1<<30 | 0x1c1<<21 | 0x04<<10,
-	ALDANDB:   0<<30 | 0x1c1<<21 | 0x04<<10,
-	ALDANDLD:  3<<30 | 0x1c3<<21 | 0x04<<10,
-	ALDANDLW:  2<<30 | 0x1c3<<21 | 0x04<<10,
-	ALDANDLH:  1<<30 | 0x1c3<<21 | 0x04<<10,
-	ALDANDLB:  0<<30 | 0x1c3<<21 | 0x04<<10,
+	ALDCLRAD:  3<<30 | 0x1c5<<21 | 0x04<<10,
+	ALDCLRAW:  2<<30 | 0x1c5<<21 | 0x04<<10,
+	ALDCLRAH:  1<<30 | 0x1c5<<21 | 0x04<<10,
+	ALDCLRAB:  0<<30 | 0x1c5<<21 | 0x04<<10,
+	ALDCLRALD: 3<<30 | 0x1c7<<21 | 0x04<<10,
+	ALDCLRALW: 2<<30 | 0x1c7<<21 | 0x04<<10,
+	ALDCLRALH: 1<<30 | 0x1c7<<21 | 0x04<<10,
+	ALDCLRALB: 0<<30 | 0x1c7<<21 | 0x04<<10,
+	ALDCLRD:   3<<30 | 0x1c1<<21 | 0x04<<10,
+	ALDCLRW:   2<<30 | 0x1c1<<21 | 0x04<<10,
+	ALDCLRH:   1<<30 | 0x1c1<<21 | 0x04<<10,
+	ALDCLRB:   0<<30 | 0x1c1<<21 | 0x04<<10,
+	ALDCLRLD:  3<<30 | 0x1c3<<21 | 0x04<<10,
+	ALDCLRLW:  2<<30 | 0x1c3<<21 | 0x04<<10,
+	ALDCLRLH:  1<<30 | 0x1c3<<21 | 0x04<<10,
+	ALDCLRLB:  0<<30 | 0x1c3<<21 | 0x04<<10,
 	ALDEORAD:  3<<30 | 0x1c5<<21 | 0x08<<10,
 	ALDEORAW:  2<<30 | 0x1c5<<21 | 0x08<<10,
 	ALDEORAH:  1<<30 | 0x1c5<<21 | 0x08<<10,
@@ -4028,7 +4028,7 @@ func (c *ctxt7) asmout(p *obj.Prog, o *Optab, out []uint32) {
 		o1 |= uint32(p.From.Reg&31) << 5
 		o1 |= uint32(p.To.Reg & 31)
 
-	case 47: // SWPx/LDADDx/LDANDx/LDEORx/LDORx/CASx Rs, (Rb), Rt
+	case 47: // SWPx/LDADDx/LDCLRx/LDEORx/LDORx/CASx Rs, (Rb), Rt
 		rs := p.From.Reg
 		rt := p.RegTo2
 		rb := p.To.Reg
-- 
cgit v1.3-5-g9baa