From d44749b65b47f42e7a5bae2e0e9b0ab6bb3d5f80 Mon Sep 17 00:00:00 2001 From: Xiaolin Zhao Date: Thu, 19 Jun 2025 20:32:10 +0800 Subject: cmd/internal/obj/loong64: add [X]VLDREPL.{B/H/W/D} instructions support Go asm syntax: VMOVQ offset(Rj), Vd. XVMOVQ offset(Rj), Xd. can have the following values: B16, H8, W4, V2, B32, H16, W8, V4 Change-Id: I44af51d58bb62649d3fe360b3abb771565e78a8a Reviewed-on: https://go-review.googlesource.com/c/go/+/682895 Reviewed-by: abner chenc Reviewed-by: Michael Knyszek Reviewed-by: Meidan Li LUCI-TryBot-Result: Go LUCI Reviewed-by: Mark Freeman --- src/cmd/asm/internal/asm/testdata/loong64enc1.s | 10 ++++++++++ 1 file changed, 10 insertions(+) (limited to 'src/cmd/asm') diff --git a/src/cmd/asm/internal/asm/testdata/loong64enc1.s b/src/cmd/asm/internal/asm/testdata/loong64enc1.s index bfff555782..dfb2a2f177 100644 --- a/src/cmd/asm/internal/asm/testdata/loong64enc1.s +++ b/src/cmd/asm/internal/asm/testdata/loong64enc1.s @@ -510,6 +510,16 @@ lable2: VMOVQ V3.W[1], V7.W4 // 67e4f772 VMOVQ V4.V[0], V6.V2 // 86f0f772 + // Load data from memory and broadcast to each element of a vector register: VMOVQ offset(Rj), . + VMOVQ (R4), V0.B16 // 80008030 + VMOVQ 1(R4), V1.H8 // 81044030 + VMOVQ 2(R4), V2.W4 // 82082030 + VMOVQ 3(R4), V3.V2 // 830c1030 + XVMOVQ (R4), X0.B32 // 80008032 + XVMOVQ 1(R4), X1.H16 // 81044032 + XVMOVQ 2(R4), X2.W8 // 82082032 + XVMOVQ 3(R4), X3.V4 // 830c1032 + // VSEQ{B,H,W,V}, XVSEQ{B,H,W,V} instruction VSEQB V1, V2, V3 // 43040070 VSEQH V1, V2, V3 // 43840070 -- cgit v1.3-5-g9baa