From 3cb0c039e9bdc4bf8ca7cc31dc7432f9f37d4079 Mon Sep 17 00:00:00 2001 From: Mauri de Souza Meneguzzo Date: Mon, 21 Oct 2024 21:47:40 +0000 Subject: cmd/asm: add support for LDREXB/STREXB These are 8-bit ARM Load/Store atomics and are available starting from armv6k. See https://developer.arm.com/documentation/dui0379/e/arm-and-thumb-instructions/strex For #69735 Change-Id: I12623433c89070495c178208ee4758b3cdefd368 GitHub-Last-Rev: d6a797836af1dccdcc6e6554725546b386d01615 GitHub-Pull-Request: golang/go#69959 Cq-Include-Trybots: luci.golang.try:gotip-linux-arm Reviewed-on: https://go-review.googlesource.com/c/go/+/621395 Reviewed-by: Keith Randall Reviewed-by: Keith Randall Reviewed-by: Cherry Mui LUCI-TryBot-Result: Go LUCI --- src/cmd/asm/internal/arch/arm.go | 2 +- src/cmd/asm/internal/asm/testdata/armerror.s | 2 ++ src/cmd/asm/internal/asm/testdata/armv6.s | 2 ++ 3 files changed, 5 insertions(+), 1 deletion(-) (limited to 'src/cmd/asm') diff --git a/src/cmd/asm/internal/arch/arm.go b/src/cmd/asm/internal/arch/arm.go index 22ac483b92..3968449842 100644 --- a/src/cmd/asm/internal/arch/arm.go +++ b/src/cmd/asm/internal/arch/arm.go @@ -101,7 +101,7 @@ func IsARMCMP(op obj.As) bool { // one of the STREX-like instructions that require special handling. func IsARMSTREX(op obj.As) bool { switch op { - case arm.ASTREX, arm.ASTREXD, arm.ASWPW, arm.ASWPBU: + case arm.ASTREX, arm.ASTREXD, arm.ASTREXB, arm.ASWPW, arm.ASWPBU: return true } return false diff --git a/src/cmd/asm/internal/asm/testdata/armerror.s b/src/cmd/asm/internal/asm/testdata/armerror.s index f2bed8d1c3..8aa16aa9cf 100644 --- a/src/cmd/asm/internal/asm/testdata/armerror.s +++ b/src/cmd/asm/internal/asm/testdata/armerror.s @@ -260,5 +260,7 @@ TEXT errors(SB),$0 STREXD R0, (R2), R1 // ERROR "cannot use same register as both source and destination" STREXD R0, (R2), R2 // ERROR "cannot use same register as both source and destination" STREXD R1, (R4), R7 // ERROR "must be even" + STREXB R0, (R2), R0 // ERROR "cannot use same register as both source and destination" + STREXB R0, (R2), R2 // ERROR "cannot use same register as both source and destination" END diff --git a/src/cmd/asm/internal/asm/testdata/armv6.s b/src/cmd/asm/internal/asm/testdata/armv6.s index 361867fdc2..faca772345 100644 --- a/src/cmd/asm/internal/asm/testdata/armv6.s +++ b/src/cmd/asm/internal/asm/testdata/armv6.s @@ -52,8 +52,10 @@ TEXT foo(SB), DUPOK|NOSPLIT, $0 MOVDF F4, F5 // c45bb7ee LDREX (R8), R9 // 9f9f98e1 + LDREXB (R11), R12 // 9fcfdbe1 LDREXD (R11), R12 // 9fcfbbe1 STREX R3, (R4), R5 // STREX (R4), R3, R5 // 935f84e1 + STREXB R8, (R9), g // STREXB (R9), R8, g // 98afc9e1 STREXD R8, (R9), g // STREXD (R9), R8, g // 98afa9e1 CMPF F8, F9 // c89ab4ee10faf1ee -- cgit v1.3-6-g1900