aboutsummaryrefslogtreecommitdiff
diff options
context:
space:
mode:
-rw-r--r--src/cmd/compile/internal/ssagen/ssa.go2
-rw-r--r--src/simd/archsimd/_gen/simdgen/gen_simdMachineOps.go2
-rw-r--r--src/simd/archsimd/_gen/simdgen/gen_simdssa.go2
3 files changed, 3 insertions, 3 deletions
diff --git a/src/cmd/compile/internal/ssagen/ssa.go b/src/cmd/compile/internal/ssagen/ssa.go
index 33fcf979c5..dd5baa0ed5 100644
--- a/src/cmd/compile/internal/ssagen/ssa.go
+++ b/src/cmd/compile/internal/ssagen/ssa.go
@@ -7795,7 +7795,7 @@ func AddrAuto(a *obj.Addr, v *ssa.Value) {
// Call returns a new CALL instruction for the SSA value v.
// It uses PrepareCall to prepare the call.
func (s *State) Call(v *ssa.Value) *obj.Prog {
- pPosIsStmt := s.pp.Pos.IsStmt() // The statement-ness fo the call comes from ssaGenState
+ pPosIsStmt := s.pp.Pos.IsStmt() // The statement-ness of the call comes from ssaGenState
s.PrepareCall(v)
p := s.Prog(obj.ACALL)
diff --git a/src/simd/archsimd/_gen/simdgen/gen_simdMachineOps.go b/src/simd/archsimd/_gen/simdgen/gen_simdMachineOps.go
index 3d99dd2a81..94b122ac39 100644
--- a/src/simd/archsimd/_gen/simdgen/gen_simdMachineOps.go
+++ b/src/simd/archsimd/_gen/simdgen/gen_simdMachineOps.go
@@ -181,7 +181,7 @@ func writeSIMDMachineOps(ops []Operation) *bytes.Buffer {
}
hasMerging = gOp.hasMaskedMerging(maskType, shapeOut)
if hasMerging && !resultInArg0 {
- // We have to copy the slice here becasue the sort will be visible from other
+ // We have to copy the slice here because the sort will be visible from other
// aliases when no reslicing is happening.
newIn := make([]Operand, len(op.In), len(op.In)+1)
copy(newIn, op.In)
diff --git a/src/simd/archsimd/_gen/simdgen/gen_simdssa.go b/src/simd/archsimd/_gen/simdgen/gen_simdssa.go
index 876ffabe3d..96d096688f 100644
--- a/src/simd/archsimd/_gen/simdgen/gen_simdssa.go
+++ b/src/simd/archsimd/_gen/simdgen/gen_simdssa.go
@@ -133,7 +133,7 @@ func writeSIMDSSA(ops []Operation) *bytes.Buffer {
if mem == NoMem && op.hasMaskedMerging(maskType, shapeOut) {
regShapeMerging := regShape
if shapeOut != OneVregOutAtIn {
- // We have to copy the slice here becasue the sort will be visible from other
+ // We have to copy the slice here because the sort will be visible from other
// aliases when no reslicing is happening.
newIn := make([]Operand, len(op.In), len(op.In)+1)
copy(newIn, op.In)